![](http://datasheet.mmic.net.cn/30000/M30622F8PGP_datasheet_2359050/M30622F8PGP_216.png)
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Programmable I/O Ports
216
Under
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Figure 1.25.7. PD0 to PD13 Registers
Port Pi direction register (i=0 to 7 and 9 to 13) (Note 1, 2, 3)
Symbol
Address
After reset
PD0 to PD3
03E216, 03E316, 03E616, 03E716
0016
PD4 to PD7
03EA16, 03EB16, 03EE16, 03EF16
0016
PD9 to PD12
03F316, 03F616, 03F716, 03FA16
0016
PD13
03FB16
0016
Bit name
Function
Bit symbol
RW
b7
b6
b5
b4
b3
b2
b1
b0
PDi_0
Port Pi0 direction bit
PDi_1
Port Pi1 direction bit
PDi_2
Port Pi2 direction bit
PDi_3
Port Pi3 direction bit
PDi_4
Port Pi4 direction bit
PDi_5
Port Pi5 direction bit
PDi_6
Port Pi6 direction bit
PDi_7
Port Pi7 direction bit
0 : Input mode
(Functions as an input port)
1 : Output mode
(Functions as an output port)
(i = 0 to 7 and 9 to 13)
Port P8 direction register
Symbol
Address
After reset
PD8
03F216
00X000002
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
PD8_0
Port P80 direction bit
PD8_1
Port P81 direction bit
PD8_2
Port P82 direction bit
PD8_3
Port P83 direction bit
PD8_4
Port P84 direction bit
Nothing is assigned. In an attempt to write to this bit, write “0”.
The value, if read, turns out to be indeterminate.
PD8_6
Port P86 direction bit
PD8_7
Port P87 direction bit
0 : Input mode
(Functions as an input port)
1 : Output mode
(Functions as an output port)
0 : Input mode
(Functions as an input port)
1 : Output mode
(Functions as an output port)
Note 1: Make sure the PD9 register is written to by the next instruction after setting the PRCR
register’s PRC2 bit to “1” (write enabled).
Note 2: During memory extension and microprocessor modes, the PD register for the pins
functioning as bus control pins (A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE,
ALE, RDY, HOLD, HLDA and BCLK) cannot be modified.
Note 3: To use ports P11 to P14, set the PUR3 register’s PU37 bit to “1” (enable). If this bit is set to
“0” (disable), the P11 to P14 pins are placed in the high-impedance state.
RW
(b5)