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Electrical Characteristics (Vcc1 = Vcc2 = 5V)
232
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Under
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Table 1.26.25. Memory Expansion and Microprocessor Modes (for setting with no wait)
VCC1 = VCC2 = 5V
Switching Characteristics
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr = – 20 to 85oC / – 40 to 85oC, CM15=“1” unless otherwise
specified)
Symbol
Standard
Measuring condition
Max.
Min.
Parameter
Unit
td(BCLK-AD)
Address output delay time
25
ns
th(BCLK-AD)
Address output hold time (refers to BCLK)
4
ns
th(BCLK-CS)
Chip select output hold time (refers to BCLK)
4
ns
td(BCLK-ALE)
ALE signal output delay time
25
ns
th(BCLK-ALE)
ALE signal output hold time
–4
ns
td(BCLK-RD)
RD signal output delay time
25
ns
th(BCLK-RD)
RD signal output hold time
0
ns
td(BCLK-WR)
WR signal output delay time
25
ns
th(BCLK-WR)
WR signal output hold time
0
ns
td(BCLK-DB)
Data output delay time (refers to BCLK)
40
ns
th(BCLK-DB)
Data output hold time (refers to BCLK)
4
ns
th(WR-DB)
Data output hold time (refers to WR)(Note 3)
ns
td(DB-WR)
Data output delay time (refers to WR)
ns
Note 1: Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
– 40
[ns]
td(BCLK-CS)
Chip select output delay time
25
ns
th(RD-AD)
Address output hold time (refers to RD)
0
ns
th(WR-AD)
Address output hold time (refers to WR)
(Note 2)
ns
Note 3: This standard value shows the timing when the output is off,
and does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t = –CR X ln (1 – VOL / VCC2)
by a circuit of the right figure.
For example, when VOL = 0.2VCC2, C = 30pF, R = 1k
, hold time
of output “L” level is
t = – 30pF X 1k
X ln (1 – 0.2VCC2 / VCC2)
= 6.7ns.
DBi
R
C
(Note 1)
(Note 2)
Note 2: Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
[ns]
Figure 1.26.1
P6
P7
P8
P10
P9
P0
P1
P2
P3
P4
P5
30pF
Figure 1.26.1. Ports P0 to P10 Measurement Circuit