Timers (Timer B)
124
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Under
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Symbol
Address
After reset
TABSR
038016
0016
Count start flag
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Timer B2 count start flag
Timer B1 count start flag
Timer B0 count start flag
Timer A4 count start flag
Timer A3 count start flag
Timer A2 count start flag
Timer A1 count start flag
Timer A0 count start flag
0 : Stops counting
1 : Starts counting
TB2S
TB1S
TB0S
TA4S
TA3S
TA2S
TA1S
TA0S
Function
Symbol
Address
After reset
CPSRF
038116
0XXXXXXX2
Clock prescaler reset flag
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Clock prescaler reset flag
CPSR
Symbol
Address
After reset
TB0
039116, 039016
Indeterminate
TB1
039316, 039216
Indeterminate
TB2
039516, 039416
Indeterminate
TB3
035116, 035016
Indeterminate
TB4
035316, 035216
Indeterminate
TB5
035516, 035416
Indeterminate
b7
b0 b7
b0
(b15)
(b8)
Timer Bi register (i=0 to 5)(Note 1)
RW
Measures a pulse period or width
Function
Symbol
Address
After reset
TBSR
034016
000XXXXX2
Timer B3, B4, B5 count start flag
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
Timer B5 count start flag
Timer B4 count start flag
Timer B3 count start flag
0 : Stops counting
1 : Starts counting
TB5S
TB4S
TB3S
Nothing is assigned. When write, set to “0”. When read, their
contents are indeterminate.
Function
Nothing is assigned. When write, set to “0”. When read, their
contents are indeterminate.
RW
RO
RW
(b4-b0)
(b6-b0)
Note 1: The register must be accessed in 16 bit units.
Note 2: The timer counts pulses from an external device or overflows or underflows of other timers.
Divide the count source by n + 1
where n = set value
Timer mode
Event counter
mode
000016 to FFFF16
Divide the count source by n + 1
where n = set value (Note 2)
000016 to FFFF16
Pulse period
modulation mode,
Pulse width
modulation mode
Setting this bit to “1” initializes the
prescaler for the timekeeping clock.
(When read, the value of this bit is “0”.)
Mode
Setting range
Figure 1.15.3. TB0 to TB5 Registers, TABSR Register, TBSR Register, CPSRF Register