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参数资料
| 型号： | M32000D4BFP-80 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 80 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 2/44页 |
| 文件大小： | 448K |
| 代理商： | M32000D4BFP-80 |
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SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
M32000D4BFP-80
10
Processor status word register
The processor status word register (PSW) shows the M32R CPU
status. It consists of the current PSW field, and the BPSW field where
a copy of the PSW field is saved when EIT occurs.
The PSW field is made up of the stack mode bit (SM), the interrupt
enable bit (IE) and the condition bit (C). The BPSW field is made up
of the backup stack mode bit (BSM), the backup interrupt enable bit
(BIE) and the backup condition bit (BC).
Note: "init." ...initial state immediately after reset
"R" ....
: read enabled
"W" ....
: write enabled
D
bit name
function
init.
R
W
16
BSM (backup SM)
saves value of SM bit when EIT occurs
undefined
17
BIE (backup IE)
saves value of IE bit when EIT occurs
undefined
23
BC (backup C)
saves value of C bit when EIT occurs
undefined
24
SM (stack mode)
0: uses R15 as the interrupt stack pointer
0
1: uses R15 as the user stack pointer
25
IE (interrupt enable)
0: does not accept interrupt
0
1: accepts interrupt
31
C (condition bit)
indicates carry, borrow and overflow resulting
0
from operations (instruction dependent)
Fig. 3 Processor status word register
16 17
23 24 25
31
15
8
7
0
SM
IE
C
BC
BSM
BIE
0
PSW
BPSW field
PSW field
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