参数资料
型号: M34509G4HFP
元件分类: 微控制器/微处理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封装: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件页数: 70/143页
文件大小: 1056K
代理商: M34509G4HFP
Rev.1.03
2009.07.27
page 32 of 140
REJ03B0147-0103
4509 Group
Fig. 24 Timer count start timing and count time when operation starts
(9) PWM1 output function (P12/CNTR0, timer 1)
When bit 3 of register W1 is set to “1”, the data is reloaded alter-
nately from reload register R1L and R1H every timer 1 underflow.
Timer 1 generates the PWM1 signal of the “L” interval set as reload
register R1L, and the “H” interval set as reload register R1H.
In this time, the PWM1 signal generated by timer 1 is output from
CNTR0 pin by setting “1” to bit 3 of register W5.
When the TW1A instruction is executed while the PWM1 signal is
“H”, the contents of register W1 is changed after the “H” interval of
the PWM1 signal is ended.
(10) PWM2 output function (P11/CNTR1, timer
1, timer 2)
When bit 3 of register W2 is set to “1”, the data is reloaded alter-
nately from reload register R2L and R2H every timer 2 underflow.
Timer 2 generates the PWM2 signal of the “L” interval set as reload
register R2L, and the “H” interval set as reload register R2H.
In this time, the PWM2 signal generated by timer 2 is output from
CNTR1 pin by setting “1” to bit 3 of register W6.
When bit 2 of register W6 is set to “1”, the PWM2 signal output to
CNTR1 pin is switched to valid/invalid alternately each timer 1 un-
derflow. However, when timer 1 is stopped (bit 2 of register W1 is
cleared to “0”), this function is canceled.
When the TW2A instruction is executed while the PWM2 signal is
“H”, the contents of register W2 is changed after the “H” interval of
the PWM2 signal is ended.
(11) Timer interrupt request flags (T1F, T2F)
Each timer interrupt request flag is set to “1” when each timer
underflows. The state of these flags can be examined with the skip
instructions (SNZT1, SNZT2).
Use the interrupt control register V1, V2 to select an interrupt or a
skip instruction.
An interrupt request flag is cleared to “0” when an interrupt occurs or
when the next instruction is skipped with a skip instruction.
Timer start
Count source
Timer value
Timer underflow signal
32
103
210
3
2
Count source
(When falling edge of
CNTR input is selected)
(12) Precautions
- Prescaler
Stop prescaler counting and then execute the TABPS instruction to
read its data.
Stop prescaler counting and then execute the TPSAB instruction to
write data to prescaler.
-Timer count source
Stop timer 1 or 2 counting to change its count source.
- Reading the count value
Stop timer 1 or 2 counting and then execute the TAB1 or TAB2 in-
struction to read its data.
-Writing to the timer
Stop timer 1 or 2 counting and then execute the T1AB, T1R1L,
T2AB or T2R2L instruction to write data to timer.
-Writing to reload register
In order to write a data to the reload register R1H while the timer 1
is operating, execute the T1HAB instruction except a timing of the
timer 1 underflow.
In order to write a data to the reload register R2H while the timer 2
is operating, execute the T2HAB instruction except a timing of the
timer 2 underflow.
- PWM signal (PWM1, PWM2)
If the timer 1 count stop timing and the timer 1 underflow timing
overlap during output of the PWM1 signal, a hazard may occur in
the PWM1 output waveform.
If the timer 2 count stop timing and the timer 2 underflow timing
overlap during output of the PWM2 signal, a hazard may occur in
the PWM2 output waveform.
- Prescaler, timer 1 and timer 2 count start timing and count time
when operation starts
Count starts from the first rising edge of the count source (2) after
prescaler and timer operations start (1).
Time to first underflow (3) is shorter (for up to 1 period of the count
source) than time among next underflow (4) by the timing to start
the timer and count source operations after count starts.
When selecting CNTR input as the count source of timer, timer
operates synchronizing with the count edge (falling edge or rising
edge) of CNTR input selected by software.
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