- 您现在的位置：买卖IC网 > PDF目录80428 > M37540M2T-XXXFP 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP32 PDF资料下载
参数资料
| 型号： | M37540M2T-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP32 |
| 封装： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件页数： | 4/88页 |
| 文件大小： | 872K |
| 代理商： | M37540M2T-XXXFP |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页
7540 Group
Rev.4.00
Jun 21, 2004
page 12 of 82
REJ03B0011-0400Z
Processor status register (PS)
The processor status register is an 8-bit register consisting of
flags which indicate the status of the processor after an arithmetic
operation. Branch operations can be performed by testing the
Carry (C) flag, Zero (Z) flag, Overflow (V) flag, or the Negative (N)
flag. In decimal mode, the Z, V, N flags are not valid.
After reset, the Interrupt disable (I) flag is set to “1”, but all other
flags are undefined. Since the Index X mode (T) and Decimal
mode (D) flags directly affect arithmetic operations, they should
be initialized in the beginning of a program.
(1) Carry flag (C)
The C flag contains a carry or borrow generated by the arithmetic
logic unit (ALU) immediately after an arithmetic operation. It can
also be changed by a shift or rotate instruction.
(2) Zero flag (Z)
The Z flag is set if the result of an immediate arithmetic operation
or a data transfer is “0”, and cleared if the result is anything other
than “0”.
(3) Interrupt disable flag (I)
The I flag disables all interrupts except for the interrupt generated
by the BRK instruction. Interrupts are disabled when the I flag is
“1”.
When an interrupt occurs, this flag is automatically set to “1” to
prevent other interrupts from interfering until the current interrupt
is serviced.
(4) Decimal mode flag (D)
The D flag determines whether additions and subtractions are ex-
ecuted in binary or decimal. Binary arithmetic is executed when
this flag is “0”; decimal arithmetic is executed when it is “1”.
Decimal correction is automatic in decimal mode. Only the ADC
and SBC instructions can be used for decimal arithmetic.
(5) Break flag (B)
The B flag is used to indicate that the current interrupt was gener-
ated by the BRK instruction. The BRK flag in the processor status
register is always “0”. When the BRK instruction is used to gener-
ate an interrupt, the processor status register is pushed onto the
stack with the break flag set to “1”. The saved processor status is
the only place where the break flag is ever set.
(6) Index X mode flag (T)
When the T flag is “0”, arithmetic operations are performed be-
tween accumulator and memory, e.g. the results of an operation
between two memory locations is stored in the accumulator. When
the T flag is “1”, direct arithmetic operations and direct data trans-
fers are enabled between memory locations, i.e. between memory
and memory, memory and I/O, and I/O and I/O. In this case, the
result of an arithmetic operation performed on data in memory lo-
cation 1 and memory location 2 is stored in memory location 1.
The address of memory location 1 is specified by index register X,
and the address of memory location 2 is specified by normal ad-
dressing modes.
(7) Overflow flag (V)
The V flag is used during the addition or subtraction of one byte
of signed data. It is set if the result exceeds +127 to -128. When
the BIT instruction is executed, bit 6 of the memory location oper-
ated on by the BIT instruction is stored in the overflow flag.
(8) Negative flag (N)
The N flag is set if the result of an arithmetic operation or data
transfer is negative. When the BIT instruction is executed, bit 7 of
the memory location operated on by the BIT instruction is stored in
the negative flag.
Table 4 Set and clear instructions of each bit of processor status register
Set instruction
Clear instruction
C flag
SEC
CLC
Z flag
–
I flag
SEI
CLI
D flag
SED
CLD
B flag
–
T flag
SET
CLT
V flag
–
CLV
N flag
–
相关PDF资料 |
PDF描述 |
|---|---|
| M37540M2V-XXXFP | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP32 |
| M37540M4V-XXXGP | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO36 |
| M30624MGP-XXXGP | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP100 |
| M37478E8SP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| MC68HC908GR8AMDW | 8-BIT, FLASH, 8.2 MHz, MICROCONTROLLER, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M37540M2T-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES |
| M37540M2V-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37540M2V-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES |
| M37540M2-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES |
| M37540M2-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
发布紧急采购，3分钟左右您将得到回复。