参数资料
型号: M37641F8FP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP80
封装: 14 X 20 MM, 0.80 MM, PLASTIC, QFP-80
文件页数: 27/140页
文件大小: 1694K
代理商: M37641F8FP
7641 Group
Rev.4.00
Aug 28, 2006
page 120 of 135
REJ03B0191-0400
Fig. 100 Timing for clear status register
qClear Status Register Command
This command clears the bits (SR3 to SR5) which are set when
the status register operation ends in error. When the “5016” com-
mand code is sent with the 1st byte, the aforementioned bits are
cleared. When the clear status register operation ends, the SRDY
(BUSY) signal changes from “H” to “L” level.
SCLK
SRXD
STXD
SRDY (BUSY)
5016
AB8 to
AB15
AB16 to
AB23
4116
data0
data255
SCLK
SRXD
STXD
SRDY (BUSY)
qPage Program Command
This command writes the specified page (256 bytes) in the flash
memory sequentially one byte at a time. Execute the page pro-
gram command as explained here following.
(1) Transfer the “4116” command code with the 1st byte.
(2) Transfer addresses AB8 to AB15 and AB16 to AB23 with the 2nd
and 3rd bytes respectively.
(3) From the 4th byte onward, as write data (DB0 to DB7) for the
page (256 bytes) specified with addresses A8 to A23 is input
sequentially from the smallest address first, that page is auto-
matically written.
When reception setup for the next 256 bytes ends, the SRDY
(BUSY) signal changes from “H” to “L” level. The result of the
page program can be known by reading the status register. For
more information, see the section on the status register.
Fig. 101 Timing for page program
相关PDF资料
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M37641M8-XXXFP 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80
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