参数资料
型号: M37906F8CSP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDIP42
封装: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件页数: 26/37页
文件大小: 352K
代理商: M37906F8CSP
29
M37906F8CFP, M37906F8CSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Som
e param
etric
lim
its are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
tc(TB)
tw(TBH)
tw(TBL)
tc(TB)
tw(TBH)
tw(TBL)
Timer B input (Count input in event counter mode)
Symbol
TBiIN input cycle time (one edge count)
TBiIN input high-level pulse width (one edge count)
TBiIN input low-level pulse width (one edge count)
TBiIN input cycle time (both edge count)
TBiIN input high-level pulse width (both edge count)
TBiIN input low-level pulse width (both edge count)
Parameter
Limits
Min.
80
40
160
80
Max.
ns
Unit
Limits
Symbol
Parameter
Min.
Max.
Unit
16
× 109
f(fsys)
8
× 109
f(fsys)
8
× 109
f(fsys)
(800)
(400)
tc(TB)
tw(TBH)
tw(TBL)
TBiIN input cycle time
TBiIN input high-level pulse width
TBiIN input low-level pulse width
ns
Timer B input (Pulse period measurement mode)
Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width
respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys)
≤ 20 MHz.
Limits
Symbol
Parameter
Min.
Max.
Unit
16
× 109
f(fsys)
8
× 109
f(fsys)
8
× 109
f(fsys)
(800)
(400)
tc(TB)
tw(TBH)
tw(TBL)
TBiIN input cycle time
TBiIN input high-level pulse width
TBiIN input low-level pulse width
ns
Timer B input (Pulse width measurement mode)
Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width
respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys)
≤ 20 MHz.
tc(CK)
tw(CKH)
tw(CKL)
td(C-Q)
th(C-Q)
tsu(D-C)
th(C-D)
Serial I/O
Symbol
CLKi input cycle time
CLKi input high-level pulse width
CLKi input low-level pulse width
TXDi output delay time
TXDi hold time
RXDi input setup time
RXDi input hold time
Parameter
Limits
Min.
200
100
0
20
90
Max.
80
ns
Unit
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