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参数资料
| 型号： | M38037M6H-XXXSP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PDIP64 |
| 封装： | 0.750 INCH, 1.78 MM PITCH, SHRINK, PLASTIC, DIP-64 |
| 文件页数： | 40/119页 |
| 文件大小： | 1818K |
| 代理商： | M38037M6H-XXXSP |
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Rev.3.11
Apr 5, 2006
Page 25 of 113
REJ03B0017-0311
3803 Group (Spec.H)
INTERRUPTS
The 3803 group (Spec.H)’s interrupts are a type of vector and
occur by 16 sources among 21 sources: eight external, twelve
internal, and one software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an
interrupt enable bit, and the interrupt disable flag except for the
software interrupt set by the BRK instruction. An interrupt
occurs if the corresponding interrupt request and enable bits are
“1” and the interrupt disable flag is “0”.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The reset and the BRK instruction cannot be disabled with any
flag or bit. The I (interrupt disable) flag disables all interrupts
except the reset and the BRK instruction interrupt.
When several interrupt requests occur at the same time, the
interrupts are received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are
automatically performed:
1. The contents of the program counter and the processor sta-
tus register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding inter-
rupt request bit is cleared.
3. The interrupt jump destination address is read from the vec-
tor table into the program counter.
Interrupt Source Selection
Which of each combination of the following interrupt sources
can be selected by the interrupt source selection register (address
003916).
1. INT0 or Timer Z
2. CNTR1 or Serial I/O3 reception
3. Serial I/O2 or Timer Z
4. INT4 or CNTR2
5. A/D converter or serial I/O3 transmission
External Interrupt Pin Selection
The occurrence sources of the external interrupt INT0 and INT4
can be selected from either input from INT00 and INT40 pin, or
input from INT01 and INT41 pin by the INT0, INT4 interrupt
switch bit of interrupt edge selection register (bit 6 of address
003A16).
<Notes>
When setting the followings, the interrupt request bit may be set
to “1”.
When setting external interrupt active edge
Related register: Interrupt edge selection register
(address 003A16)
Timer XY mode register (address 002316)
Timer Z mode register (address 002A16)
When switching interrupt sources of an interrupt vector
address where two or more interrupt sources are allocated
Related register: Interrupt source selection register
(address 003916)
When not requiring for the interrupt occurrence synchronized
with these setting, take the following sequence.
(1) Set the corresponding interrupt enable bit to “0” (disabled).
(2) Set the interrupt edge select bit (the active edge switch bit)
or the interrupt source select bit.
(3) Set the corresponding interrupt request bit to “0” after 1 or
more instructions have been executed.
(4) Set the corresponding interrupt enable bit to “1” (enabled).
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| M38039FFH-HP#U | 制造商:Renesas Electronics Corporation 功能描述:8BIT 740 CISC 56KB FLASH 16.8MHZ 3.3/5V - Trays |
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