参数资料
型号: M38039G4H-XXXKP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64
封装: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件页数: 93/105页
文件大小: 1416K
代理商: M38039G4H-XXXKP
REJ03B0166-0113 Rev.1.13
Aug 21, 2009
Page 86 of 100
3803 Group (Spec.H QzROM version)
Notes on Using Stop Mode
Register setting
Since values of the prescaler 12 and Timer 1 are automatically
reloaded when returning from the stop mode, set them again,
respectively. (When the oscillation stabilizing time set after STP
instruction released bit is “0”)
Clock restoration
After restoration from the stop mode to the normal mode by an
interrupt request, the contents of the CPU mode register previous
to the STP instruction execution are retained. Accordingly, if
both main clock and sub clock were oscillating before execution
of the STP instruction, the oscillation of both clocks is resumed
at restoration.
In the above case, when the main clock side is set as a system
clock, the oscillation stabilizing time for approximately 8,000
cycles of the XIN input is reserved at restoration from the stop
mode. At this time, note that the oscillation on the sub clock side
may not be stabilized even after the lapse of the oscillation
stabilizing time of the main clock side.
Notes on Wait Mode
Clock restoration
If the wait mode is released by a reset when XCIN is set as the
system clock and XIN oscillation is stopped during execution of
the WIT instruction, XCIN oscillation stops, XIN oscillations
starts, and XIN is set as the system clock.
In the above case, the RESET pin should be held at “L” until the
oscillation is stabilized.
Notes on Handling of Power Source Pins
In order to avoid a latch-up occurrence, connect a capacitor
suitable for high frequencies as bypass capacitor between power
source pin (VCC pin) and GND pin (VSS pin), and between power
source pin (VCC pin) and analog power source input pin (AVSS
pin). Besides, connect the capacitor to as close as possible. For
bypass capacitor which should not be located too far from the
pins to be connected, a ceramic capacitor of 0.01
F–0.1 F is
recommended.
Notes on Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and
may perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the power source voltage is less
than the recommended operating conditions and design a system
not to cause errors to the system by this unstable operation.
Notes on Product Shipped in Blank
As for the product shipped in blank, Renesas does not perform
the writing test to user ROM area after the assembly process
though the QzROM writing test is performed enough before the
assembly process. Therefore, a writing error of approx.0.1 %
may occur. Moreover, please note the contact of cables and
foreign bodies on a socket, etc. because a writing environment
may cause some writing errors.
Precautions Regarding Overvoltage in QzROM Version
Make sure that voltage exceeding the VCC pin voltage is not
applied to other pins. In particular, ensure that the state indicated
by bold lines in figure below does not occur for CNVSS pin (VPP
power source pin for QzROM) during power-on or power-off.
Otherwise the contents of QzROM could be rewritten.
Fig 84. Timing Diagram (bold-lined periods are applicable)
Notes on QzROM Version
Connect the CNVSS/VPP pin the shortest possible to the GND
pattern which is supplied to the VSS pin of the microcomputer.
In addition connecting an approximately 5 k
resistor in series to
the GND could improve noise immunity. In this case as well as
the above mention, connect the pin the shortest possible to the
GND pattern which is supplied to the VSS pin o f the
microcomputer.
Reason
The CNVSS/VPP pin is the power source input pin for the built-in
QzROM. When programming in the QzROM, the impedance of
the VPP pin is low to allow the electric current for writing to flow
into the built-in QzROM. Because of this, noise can enter easily.
If noise enters the VPP pin, abnormal instruction codes or data
are read from the QzROM, which may cause a program runaway.
Fig 85. Wiring for the CNVSS/VPP
VCC pin voltage
CNVSS pin voltage
1.8 V
(1) The input voltage to other MCU pins rises before the VCC pin
voltage rises.
(2) The input voltage to other MCU pins falls before the VCC pin
voltage falls.
Note: If VCC falls below the minimum value 1.8 V (shaded areas),
the internal circuit becomes unstable. Take additional care
to prevent overvoltage.
~~
(1)
(2)
~~
The shortest
CNVSS/VPP
VSS
Approx. 5k
The shortest
(Note)
Note. Shows the microcomputer’s pin.
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