- 您现在的位置：买卖IC网 > PDF目录299434 > M39208-15WNB1 (STMICROELECTRONICS) 256K X 8 FLASH 2.7V PROM, 150 ns, PDSO32 PDF资料下载
参数资料
| 型号： | M39208-15WNB1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 256K X 8 FLASH 2.7V PROM, 150 ns, PDSO32 |
| 封装： | 8 X 14 MM, PLASTIC, TSOP-32 |
| 文件页数： | 28/30页 |
| 文件大小： | 218K |
| 代理商： | M39208-15WNB1 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页当前第28页第29页第30页
Read the EEPROM Block Identifier
The EEPROM block identifier (64 bytes, user de-
fined) can be read with a single Read operation with
A6 = ’0’ and A9 = VID (see Table 5).
Read the OTP Row
The OTP row is mapped in the EEPROM block
(EE = ’0’, EF = ’1’). Read of the OTP row (64 bytes)
is by an instruction (see Table 4) composed of three
specific Write operations of data bytes at three
specific memory locations (each location in a dif-
ferent page) before reading the OTP row content.
When accessing the OTP row, only the LSB ad-
dresses (A6 to A0) are decoded where A6 must be
’0’.
Each Read of the OTP row has to be followed by
the Return instruction (see Table 4).
Read the Flash Sector Protection Status
Reading the Flash sector protection status is by an
instruction similar to the Read Manufacturer iden-
tifier instruction, the only difference being the value
of the logic levels applied on A0, A1, A6, while A16
and A17 define the Flash sector whose protection
has to be verified. Such a read instruction will
output a 01h if the Flash sector is protected and a
00h if the Flash sector is not protected.
The Flash sector protection status can also be
verified with a Read operation (see chapter: Flash
block specific features), with VID on A9.
Read the Status Bits
The M39208 provides several Write operation
status flags which may be used to minimize the
application write (or erase or program) time. These
signals are available on the I/O port bits when
programming (or erasing) are in progress.
Data Polling flag, DQ7. When Erasing or Pro-
gramming into the Flash block (or when Writing into
the EEPROM block), bit DQ7 outputs the comple-
ment of the bit being entered for Program-
ming/ Writing on DQ7. Once the Pr ogr am
instruction or the Write operation is performed, the
true logic value is read on DQ7 (in a Read opera-
tion).
Flash memory block specific features:
– Data Polling is effective after the fourth W pulse
(for programming) or after the sixth W pulse (for
Erase). It must be performed at the address
being programmed or at an address within the
Flash sector being erased.
– During an Erase instruction, DQ7 outputs a ’0’.
After completion of the instruction, DQ7 will out-
put the last bit programmed (that is a ’1’ after
erasing).
– if the byte to be programmed is in a protected
Flash sector, the instruction is ignored.
– If all the Flash sectors to be erased are pro-
tected, DQ7 will be set to ’0’ for about 100
s, and
then return to the previous addressed byte. No
erasure will be performed.
– if all sectors are protected, a Bulk Erase instruc-
tion is ignored.
Toggle flag, DQ6. The M39208 also offers another
way for determining when the EEPROM write or
the Flash memory Program instruction is com-
pleted. During the internal Write operation, the DQ6
will toggle from ’0’ to ’1’ and ’1’ to ’0’ on subsequent
attempts to read any byte of the memory, when
either G , EE or EF is low.
When the internal cycle is completed the toggling
will stop and the data read on DQ0-DQ7 is the
addressed memory byte. The device is now acces-
sible for a new Read or Write operation. The opera-
tion is completed when two successive reads yield
the same output data.
Flash memory block specific features:
a. the Toggle bit is effective after the fourth W pulse
(for programming) or after the sixth W pulse (for
Erase).
b. If the byte to be programmed belongs to a pro-
tected Flash sector, the instruction is ignored and:
EF
EE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Flash
VIL
VIH
Data
Polling
Toggle
Flag
Error
Flag
X
Erase
Time-out
XX
X
EEPROM
VIH
VIL
Data
Polling
Toggle
Flag
XX
X
Note: X = Not guaranteed value, can be read either ’1’ or ’0’.
Table 6. Status Bit
7/30
M39208
相关PDF资料 |
PDF描述 |
|---|---|
| M3933/10-17N | 0 MHz - 18000 MHz RF/MICROWAVE FIXED ATTENUATOR |
| M3933/25-65N | 0 MHz - 18000 MHz RF/MICROWAVE FIXED ATTENUATOR |
| M3933/10-16S | 0 MHz - 18000 MHz RF/MICROWAVE FIXED ATTENUATOR |
| M3933/14-23S | 0 MHz - 12400 MHz RF/MICROWAVE FIXED ATTENUATOR |
| M3933/25-31S | 0 MHz - 18000 MHz RF/MICROWAVE FIXED ATTENUATOR |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M39208-15WNB1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Single Chip 2 Mbit Flash and 64 Kbit Parallel EEPROM Memory |
| M39208-15WNB5T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Single Chip 2 Mbit Flash and 64 Kbit Parallel EEPROM Memory |
| M39208-15WNB6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Single Chip 2 Mbit Flash and 64 Kbit Parallel EEPROM Memory |
| M39208NA | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Single Chip 2 Mbit Flash and 64 Kbit Parallel EEPROM Memory |
| M39208NB | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Single Chip 2 Mbit Flash and 64 Kbit Parallel EEPROM Memory |
发布紧急采购，3分钟左右您将得到回复。