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参数资料
| 型号： | M66290AGP |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封装： | LQFP-48 |
| 文件页数： | 30/54页 |
| 文件大小： | 452K |
| 代理商： | M66290AGP |
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USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
35
-
xxxx
W/R
If the selected endpoint is set to OUT, this becomes to
receive data FIFO register.
If the selected endpoint is set to IN, this becomes to
transmit data FIFO register.
If the selected endpoint is set to 8-bit mode, lower 8 bit [7:0] is valid.
When read or write, 200ns (min) of cycle time is needed.
(Continuous access at 5MHz is available)
Read operation when direction IN is appointed or write operation
when direction OUT is appointed, write operation is inhibited.
CPU_FIFO data
CPU_FIFO
[15:0]
15 to 0
Bit
Name
Function
W/R
USB
S/W
H/W
Reset
-
0
W/R
Set the operation mode of DMA transfer.
0 : High speed transfer mode
1 : One word transfer mode
In high speed transfer mode, when endpoint buffer is in read/write enable
in the state that DMA transfer enable, Dreq is asserted.
In one word transfer mode, when endpoint buffer is in read/write enable
in the state that DMA transfer enable and Dack="H", Dreq is asserted.
In both mode, Dreq detects Dack="L" and is negated.
DMA operation
mode
MODE
15
Reset
Function
Name
Bit
Name
Bit
Write/Read "0"
Reserved
14 to 9
-
0
W/R
-
0000
W/R
Write/Read "0"
Appoint the endpoint for DMA transfer.
"0001"=EP1,"0010"=EP2,"0011"=EP3,
"0100"=EP4,"0101"=EP5
EP0 can not be appointed.
Don't change the setting during write (IN) or read (OUT).
Change of the setting of the endpoint of direction IN must
be done after confirmed that IVAL="0" and Dreq="0", or
IVAL="1" and Dreq="1".
Change of the setting of the endpoint of direction OUT must
be done after confirmed that IVAL="0" and Dreq="1".
DMA transfer
endpoint
If this bit is "1", endpoint buffer which is appointed by DMA_EP[3:0]
is enable to write or when read is enable, Dreq is asserted.
If "0" is written in DMA transferring, DMA transfer is forced to end.
DMA transfer
enable
Reserved
DMA_EP
[3:0]
3 to 0
7 to 4
DMAEN
8
W/R
USB
S/W
H/W
MODE
DMAEN
DMA_EP[3:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
(4-3) CPU_FIFO Data Register (Address : 44h)
(4-4) DMA_FIFO Selection Register (Address : 48h)
CPU_FIFO[15:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M66291GP | 制造商:Renesas Electronics Corporation 功能描述: |
| M66291GP#201 | 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP |
| M66291GP#RB0S | 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| M66291GPRB0S | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48 |
| M66291HP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller) |
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