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参数资料
| 型号： | M66290AGP |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封装： | LQFP-48 |
| 文件页数： | 34/54页 |
| 文件大小： | 452K |
| 代理商： | M66290AGP |
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USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
3
OSCILLATO
R OUTPUT
OSCILLATO
R INPUT
-
1
Generate an internal clock.
Input or output of internal clock oscillator. When use as a crystal oscillator, connect a
crystal between Xin and Xout.
If an external clock is used, input it to Xin, and Xout must be opened.
Others
Output
Xout
Input
Xin
1
RESET
"L" level initializes the register or the counter of M66290A.
Input
RST
JTAG
interface
1
TEST2 INPUT (Built-in pull down resistor)
Input for the test. Keep "L" level or open.
TEST1 INPUT (Built-in pull down resistor)
Input for the test. Keep "L" level or open.
Input
TEST2
Input
TEST1
GND
CPU
interface
DMA
interface
USB
interface
1
3
Ground
Power supply pin
VCC
Output
Input
TEST DATA OUTPUT
Data output from JTAG. If the JTAG is not used, keep open.
TDO
TEST DATA INPUT (Built-in pull up resistor)
Data input to JTAG. If JTAG is not used, keep "H" level or open.
TDI
Input
TEST CLOCK INPUT (Built-in pull down resistor)
Clock input to JTAG. If JTAG is not used, keep "L" level or open.
TCK
TMS
Input
TEST MODE INPUT (Built-in pull up resistor)
Mode set input to JTAG. If JTAG is not used, keep "H" level or open.
TEST RESET INPUT (Built-in pull up resistor)
Reset input of JTAG. Even if the JTAG is not used, JTAG circuit must be
initialized. Input "L" level to initialize like the RST input.
Input
TRST
DMA ACKNOWLEDGE
FIFO access by DMA transfer is available in "L" level
Input
Dack
TrON OUTPUT
Connect to the D+ pull-up resistor of 1.5kohm.
ON/OFF control of the pull-up resistor is available.
Vbus INPUT (Built-in pull down resistor)
Connect to the Vbus of USB bus or to the 5V power supply.
Connection or shutdown of the Vbus can be detected.
Output
Input
TrON
Vbus
USB DATA(-)
D- of USB. Connect the external resistor serially.
Input/
Output
D-
Input/
Output
USB DATA(+)
D+ of USB. Connect the external resistor serially.
D+
Dreq
Output
DMA REQUEST
DMA transfer request to endpoint FIFO
INT
Output
INTERRUPT
"L" level requests interrupt to system
Input
RD
READ STROBE
Register data can be read when "L" level
WR
Input
1
WRITE STROBE
Input data is written into the register by the positive edge
1
CHIP SELECT
"L" level enables to communicate with M66290A
Input
CS
ADDRESS BUS
Address bus to access the register from the system
Input
A6 to A1
DATA BUS
Data bus to access the register from the system
Input/
Output
D15 to D0
6
16
Item
Pin name
Input/
Function
Number of
PIN DESCRIPTIONS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M66291GP | 制造商:Renesas Electronics Corporation 功能描述: |
| M66291GP#201 | 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP |
| M66291GP#RB0S | 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| M66291GPRB0S | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48 |
| M66291HP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller) |
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