参数资料
型号: M95256-RDW3/A
厂商: STMICROELECTRONICS
元件分类: PROM
英文描述: 32K X 8 SPI BUS SERIAL EEPROM, PDSO8
封装: 0.169 INCH, TSSOP-8
文件页数: 15/43页
文件大小: 431K
代理商: M95256-RDW3/A
Instructions
M95256, M95256-W, M95256-R
Figure 11. Page Write (WRITE) Sequence
1.
The most significant address bit (b15) is Don’t Care.
5.6.1
ECC (Error Correction Code) and Write cycling
The M95256 (5V version, processed in F6DP26%, identified with letter "V") does not offer
the ECC logic and is qualified for a maximum number of 100,000 Write cycles.
The M95256-W and the M95256-R devices (2.5V and 1.8V versions, processed in F8 and
identified with the letter "A") offer an ECC (Error Correction Code) logic which compares
each 4-Byte packet with its associated ECC Word (6 EEPROM bits). As a result, if a single
bit out of 4 Bytes of data happens to be erroneous during a Read operation, the ECC
detects it and replaces it by the correct value. The read reliability is therefore much improved
by the use of this feature.
Note however that even though a single Byte has to be written, 4 Bytes are internally
modified (plus the ECC Word), that is, the addressed Byte is cycled together with the three
other Bytes making up the packet. It is therefore recommended to Write by packets of 4
Bytes in order to benefit from the larger amount of Write cycles.
The maximum number of Write cycles for the M95256-W and the M95256-R devices is
qualified as 1 Million (1,000,000 Write cycles), using a cycling routine that writes to the
device Page by Page (that is, by multiples of 4-Byte packets).
C
D
AI01796D
S
34
33
35 36 37 38 39 40 41 42
44 45 46 47
32
C
D
S
15
2
1
3456789 10
20 21 22 23 24 25 26 27
14 13
3210
28 29 30
Instruction
16-Bit Address
0
765432
0
1
Data Byte 1
31
43
765432
0
1
Data Byte 2
765432
0
1
Data Byte 3
65432
0
1
Data Byte N
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