参数资料
型号: MAX1038AEEE+T
厂商: Maxim Integrated Products
文件页数: 23/23页
文件大小: 0K
描述: IC ADC 8BIT LP SERIAL 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 8
采样率(每秒): 188k
数据接口: I²C,串行
转换器数目: 1
功率耗散(最大): 1.75mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
输入数目和类型: 12 个单端,单极;12 个单端,双极;6 个伪差分,单极;6 个伪差分,双极
of the address byte (see the
Slave Address section).
The T/H circuitry enters hold mode two internal clock
cycles later. A conversion or series of conversions are
then internally clocked (eight clock cycles per conver-
sion) and the MAX1036–MAX1039 hold SCL low. When
operating in external clock mode, the T/H circuitry
enters track mode on the seventh falling edge of a valid
slave address byte. Hold mode is then entered on the
falling edge of the eighth clock cycle. The conversion is
performed during the next eight clock cycles.
The time required for the T/H circuitry to acquire an
input signal is a function of input capacitance. If the
analog input source impedance is high, the acquisition
time lengthens and more time must be allowed
between conversions. The acquisition time (tACQ) is the
minimum time needed for the signal to be acquired. It
is calculated by:
tACQ ≥ 6.25 (RSOURCE + RIN) CIN
where RSOURCE is the analog input source impedance,
RIN = 2.5kΩ, and CIN = 18pF. tACQ is 1/fSCL for external
clock mode. For internal clock mode, the acquisition
time is two internal clock cycles. To select RSOURCE,
allow 625ns for tACQ in internal clock mode to account
for clock frequency variations.
MAX1036–MAX1039
2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel 2-Wire Serial 8-Bit ADCs
_______________________________________________________________________________________
9
tHD.STA
tSU.DAT
tHIGH
tR
tF
tHD.DAT
tHD.STA
S
Sr
A
SCL
SDA
tSU.STA
tLOW
tBUF
tSU.STO
PS
tHD.STA
tSU.DAT
tHIGH
tFCL
tHD.DAT
tHD.STA
S
Sr
A
SCL
SDA
tSU.STA
tLOW
tBUF
tSU.STO
S
tRCL
tRCL1
HS-MODE
F/S-MODE
A. F/S-MODE I2C SERIAL INTERFACE TIMING
B. HS-MODE I2C SERIAL INTERFACE TIMING
tFDA
tRDA
t
tR
tF
Figure 1. I2C Serial Interface Timing
VDD
IOL = 3mA
IOH = 0mA
VOUT
400pF
SDA
Figure 2. Load Circuit
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