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参数资料
| 型号： | MAX1383ATP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/25页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 1.25MSPS 20-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 位数： | 12 |
| 采样率（每秒）： | 1.25M |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 85.5mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WQFN 裸露焊盘 |
| 供应商设备封装： | 20-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，单极；2 个单端，双极；1 个差分，单极；1 个差分，双极 |
MAX1377/MAX1379/MAX1383
Dual, 12-Bit, 1.25Msps Simultaneous-Sampling
ADCs with Serial Interface
20
______________________________________________________________________________________
Exiting Partial and Full Power-Down Modes
Drive CNVST low and allow at least 14 SCLK cycles to
elapse before driving CNVST high to exit partial or full
power-down mode. When exiting partial power-down
mode, conversions can begin immediately without hav-
ing to wait for the reference to wake-up. When exiting
full power-down mode, allow at least 2ms recovery time
after exiting to ensure that the internal reference has
settled.
In partial or full power-down mode, maintain idle SCLK
low or high to minimize power.
Applications Information
SPI and MICROWIRE
The MAX1377/MAX1379/MAX1383 are compatible with
all four modes programmed with the CPHA and CPOL
bits in the SPI or MICROWIRE control register.
Conversion begins with a CNVST falling edge. DOUT_
goes low, indicating a conversion is in progress. Two
consecutive 8-bit reads are required to get the full 12
bits from the ADC. DOUT_ transitions on the rising edge
of SCLK. DOUT_ is guaranteed to be valid tDOUT after
the rising edge of SCLK and remains valid until tDHOLD
after the next SCLK rising edge (see Figure 13).
1ST SCLK RISING EDGE
0
D11
D10
D8
D7
DOUT_
MODE
SCLK
CNVST
0
FPD
PPD
NORMAL
0
DOUT_ ENTERS THREE-STATE ONCE CNVST GOES HIGH
EXECUTE PARTIAL POWER-DOWN SEQUENCE TWICE
0
D9
0
REF
ENABLED
DISABLED
Figure 12. Full Power-Down Mode Timing Sequence
DOUT_
MODE
SCLK
CNVST
DOUT_ GOES HIGH IMPEDANCE ONCE CNVST GOES HIGH
CNVST MUST GO HIGH AFTER THE 3RD
BUT BEFORE THE 14TH
SCLK RISING EDGE
1ST SCLK RISING EDGE
PARTIAL POWER-DOWN
0
D11
D10
D9
D8
D7
NORMAL
0
REF
ENABLED
1
39
14
PPD WINDOW
Figure 11. Partial Power-Down Timing Sequence
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1385AETM | 制造商:Maxim Integrated Products 功能描述:12-BIT MULTI-CH ADC WITH MULTICH DA - Rail/Tube |
| MAX1385AETM+ | 制造商:Maxim Integrated Products 功能描述: |
| MAX1385BETM | 制造商:Maxim Integrated Products 功能描述:12-BIT MULTI-CH ADC WITH MULTICH DA - Rail/Tube |
| MAX1385BETM+ | 功能描述:射频放大器 2Ch RF LDMOS Bias Controller RoHS:否 制造商:Skyworks Solutions, Inc. 类型:Low Noise Amplifier 工作频率:2.3 GHz to 2.8 GHz P1dB:18.5 dBm 输出截获点:37.5 dBm 功率增益类型:32 dB 噪声系数:0.85 dB 工作电源电压:5 V 电源电流:125 mA 测试频率:2.6 GHz 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-16 封装:Reel |
| MAX1385BETM+T | 功能描述:射频放大器 2Ch RF LDMOS Bias Controller RoHS:否 制造商:Skyworks Solutions, Inc. 类型:Low Noise Amplifier 工作频率:2.3 GHz to 2.8 GHz P1dB:18.5 dBm 输出截获点:37.5 dBm 功率增益类型:32 dB 噪声系数:0.85 dB 工作电源电压:5 V 电源电流:125 mA 测试频率:2.6 GHz 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-16 封装:Reel |
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