参数资料
| 型号： | MAX1409CAP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 29/48页 |
| 文件大小： | 0K |
| 描述： | IC DAS 16BIT LP 20-SSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 类型： | 数据采集系统（DAS） |
| 分辨率（位）： | 16 b |
| 采样率（每秒）： | 60 |
| 数据接口： | 串行 |
| 电压电源： | 模拟和数字 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 带卷 (TR) |
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MAX1407/MAX1408/MAX1409/MAX1414
Low-Power, 16-Bit Multichannel DAS with
Internal Reference,10-Bit DACs, and RTC
______________________________________________________________________________________
35
REFE: Internal Reference Power Enable. When REFE is
set to 1, the internal reference is powered up. When
REFE is set to 0, the internal reference is powered down
allowing an external reference to be connected to REF.
ADCE: ADC Power Enable. When ADCE is set to 1, the
ADC is powered up. When ADCE is set to 0, the ADC is
powered down.
BUFE: ADC Input Buffer Power Enable. A logic 1
enables the power-up of the ADC input buffers, while a
logic 0 powers-down the buffers.
MUXE: Multiplexer enable. A logic 0 disables the multi-
plexer outputs while a logic 1 enables them.
Power-Control Registers
Table 8 shows the bit values of some key registers in
different power modes under various conditions. Use
this as a quick reference when programming the
MAX1407/MAX1408/MAX1409/MAX1414 family.
Table 8. Related Bit Values During Specified Mode
CIRCUIT BLOCK
BIT
INITIAL POWER-UP
SLEEP
STANDBY
IDLE
RUN
WAKE-UP EVENT
32kHz Oscillator
CH
0 (oscillator is on)
N/A
RTC
CH
0 (RTC is on)
N/A
Low VDD Voltage
Monitor (2.7V)
LVDE
1 (2.7V monitor is
on)
1 if VM = 0
0 if VM = 1
11
1
RESET Voltage
Monitor (1.8V)
LSDE
0 (1.8V monitor is
off)
0 if VM = 0
1 if VM = 1
0 if VM = 0
1 if VM = 1
0 if VM = 0
1 if VM = 1
0 if VM = 0
1 if VM = 1
N/A
Reset Bit
RST
1 (RESET asserted)
N/A
Low VDD Status Bit
LVD
1 (low VDD)
N/A
Voltage-Monitor
Threshold Selection
VM
0 (select 2.7V)
N/A
Bias Circuit
BIASE
Biase = 1 (biase
circuit is on)
01
11
1
PLL
PLLE
1 (PLL is on)
0
1
PLL Output
PLLE
1 (FOUT is enabled)
0
1
SHDN Output
SHDE
1 (SHDN pin = high)
01
11
1
DAC1
DA1E
0
1
N/A
DAC2
DA2E
0
1
N/A
ADC MUX
MUX
0
1
N/A
Bandgap Reference
REFE
0
1
N/A
Signal-Detect
Comparator
SDCE
0
1
N/A
ADC Buffers
BUFE
0
1
N/A
ADC
0
1
N/A
N/A: Programming the part into these modes would not alter the content of the corresponding bit.
POWER1 REGISTER (11000)
FIRST BIT (MSB)
(LSB)
NAME
REFE
ADCE
BUFE
MUXE
DA1E
DA2E
——
DEFAULT
00000000
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