参数资料
型号: MAX1471ATJ+
厂商: Maxim Integrated
文件页数: 4/26页
文件大小: 0K
描述: IC RCVR ASK/FSK LP 32-TQFN
其它有关文件: Automotive Product Guide
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
频率: 315MHz,434MHz
灵敏度: -114dBm
调制或协议: ASK,FSK
应用: ISM,车库门开启器,RKE
电流 - 接收: 7mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 3.3V,5V
工作温度: -40°C ~ 125°C
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 管件
315MHz/434MHz Low-Power, 3V/5V
ASK/FSK Superheterodyne Receiver
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, V AVDD = V DVDD = V HVIN = +2.4V to +3.6V, f RF = 300MHz to 450MHz, T A = -40°C to +125°C, unless other-
wise noted. Typical values are at V AVDD = V DVDD = V HVIN = +3.0V, f RF = 434 MHz, T A = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG BASEBAND
Maximum Data Filter Bandwidth
Maximum Data Slicer Bandwidth
Maximum Peak Detector
Bandwidth
Maximum Data Rate
BW DF
BW DS
BW PD
Manchester coded
Nonreturn to zero (NRZ)
50
100
50
33
66
kHz
kHz
kHz
kbps
CRYSTAL OSCILLATOR
Crystal Frequency
Frequency Pulling by V DD
Crystal Load Capacitance
f XTAL
9.04
3
3
13.728
MHz
ppm/V
pF
DIGITAL INTERFACE TIMING (se e Figure 8)
Minimum SCLK Setup to Falling
Edge of CS
Minimum CS Falling Edge to
SCLK Rising-Edge Setup Time
Minimum CS Idle Time
Minimum CS Period
Maximum SCLK Falling Edge to
Data Valid Delay
Minimum Data Valid to SCLK
Rising-Edge Setup Time
Minimum Data Valid to SCLK
Rising-Edge Hold Time
Minimum SCLK High Pulse Width
Minimum SCLK Low Pulse Width
Minimum CS Rising Edge to
SCLK Rising-Edge Hold Time
Maximum CS Falling Edge to
Output Enable Time
Maximum CS Rising Edge to
Output Disable Time
t SC
t CSS
t CSI
t CS
t DO
t DS
t DH
t CH
t CL
t CSH
t DV
t TR
30
30
125
2.125
80
30
30
100
100
30
25
25
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
Note 1:
Note 2:
Note 3:
Note 4:
Production tested at T A = +85°C. Guaranteed by design and characterization over entire temperature range.
Guaranteed by design and characterization. Not production tested.
The oscillator register (0x3) is set to the nearest integer result of f XTAL / 100kHz (see the Oscillator Frequency Register section).
Input impedance is measured at the LNAIN pin. Note that the impedance at 315MHz includes the 15nH inductive degeneration
from the LNA source to ground. The impedance at 434MHz includes a 10nH inductive degeneration connected from the LNA
source to ground. The equivalent input circuit is 50 ? in series with 2.2pF. The voltage conversion gain is measured with the
LNA input matching inductor, the degeneration inductor, and the LNA/mixer resonator in place, and does not include the IF fil-
ter insertion loss.
4
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MAX1471ATJ/V+T 功能描述:射频接收器 315MHz/434MHz Low-Power 3V/5V ASK/FSK Superheterodyne Receiver RoHS:否 制造商:Skyworks Solutions, Inc. 类型:GPS Receiver 封装 / 箱体:QFN-24 工作频率:4.092 MHz 工作电源电压:3.3 V 封装:Reel
MAX1471ATJ+ 功能描述:射频接收器 315MHz/434MHz Superheterodyne Rcvr RoHS:否 制造商:Skyworks Solutions, Inc. 类型:GPS Receiver 封装 / 箱体:QFN-24 工作频率:4.092 MHz 工作电源电压:3.3 V 封装:Reel
MAX1471ATJ+T 功能描述:射频接收器 315MHz/434MHz Superheterodyne Rcvr RoHS:否 制造商:Skyworks Solutions, Inc. 类型:GPS Receiver 封装 / 箱体:QFN-24 工作频率:4.092 MHz 工作电源电压:3.3 V 封装:Reel
MAX1471ATJ-C3N 功能描述:射频接收器 315MHz/434MHz Superheterodyne Rcvr RoHS:否 制造商:Skyworks Solutions, Inc. 类型:GPS Receiver 封装 / 箱体:QFN-24 工作频率:4.092 MHz 工作电源电压:3.3 V 封装:Reel