参数资料
型号: MAX1494CCJ+T
厂商: Maxim Integrated
文件页数: 11/34页
文件大小: 0K
描述: IC ADC W/LCD DRIVER 32-TQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
显示器类型: LCD
配置: 7 段 + 2 个信号器
接口: 串行
数字或字符: A/D,4.5 位数字
电流 - 电源: 960µA
电源电压: 2.7 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 带卷 (TR)
3.5- and 4.5-Digit, Single-Chip ADCs
with LCD Drivers
ten times the first-notch frequency and 60Hz is equal to
12 times the first-notch frequency.
X
Y
Z
For large step changes at the input, allow a settling
time of 800ms before valid data is read.
Clock Modes
a
a
Configure the MAX1492/MAX1494 to use either the
internal oscillator or an externally applied clock to drive
f
b
BP1
f
b
the modulator and filter. Set the EXTCLK bit in the con-
trol register to 0 to put the device in internal clock mode.
g
g
Set the EXTCLK bit high to put the device in external
e
c
BP2
e
c
clock mode. Connect CLK to GND or DVDD when using
d
d
the internal oscillator. The MAX1492/MAX1494 ideally
operate with a 4.9152MHz clock to achieve maximum
rejection of 50Hz/60Hz common-mode, power-supply,
DP
ANNUNCIATOR
BP3
DP
ANNUNCIATOR
and normal-mode noise.
Internal Clock Mode
The MAX1492/MAX1494 contain an internal oscillator.
The power-up condition for the MAX1492/MAX1494 is
internal clock operation with the EXTCLK bit in the con-
trol register equal to 0. Using the internal oscillator
saves board space by removing the need for an exter-
nal clock source.
External Clock Mode
For external clock operation, set the EXTCLK bit in the
control register high and drive CLK with a 4.9152MHz
clock source. Using an external clock allows for custom
conversion rates. A 2.4576MHz clock signal reduces
the conversion rate and the LCD update rate by a fac-
tor of two. The MAX1492/MAX1494 operate with an
external clock source of up to 5.05MHz.
Charge Pump
The MAX1492/MAX1494 contain an internal charge
pump to provide the negative supply voltage for the inter-
nal analog input/reference buffers. The bipolar input
range of the analog input/reference buffers allows this
device to accept negative inputs with high source imped-
ances. Connect a 0.1μF capacitor from V NEG to GND.
LCD Driver
The MAX1492/MAX1494 contain the necessary back-
plane and segment-driver outputs to drive 3.5-digit
Table 1. List of Custom LCD Manufacturers
Figure 3. Connection Diagrams for Typical 7-Segment Displays
(MAX1492) and 4.5-digit (MAX1494) LCDs. The LCD
update rate is 2.5Hz. Figures 4–7 show the connection
schemes for a standard LCD. The MAX1492/MAX1494
automatically display the results of the ADC, if desired.
The MAX1492/MAX1494 also allow independent control
of the LCD driver through the serial interface, allowing
for data processing of the ADC result before showing
the result on the LCD. Additionally, each LCD segment
can be individually controlled (see the LCD Segment-
Display Register sections).
Triplexing
An internal resistor string comprised of three equal-
value resistors (52k ? , 1% matching) is used to gener-
ate the display drive voltages. On the MAX1492, one
end of the string is connected to DVDD and the other
end is connected to GND. On the MAX1494, the other
end of the resistor string is connected to V DISP . Note
that V LCD should be three times the threshold voltage
for the liquid crystal material used (Figure 9).
The connection diagrams for a typical 7-segment dis-
play-font decimal point and annunciators are illustrated
in Figures 3 and 8. The MAX1494/MAX1492 numeric
display drivers (4.5 digits, 3.5 digits) use this configura-
tion to drive a triplexed LCD with three backplanes and
13 segment-driver lines (10 for 3.5 digits). Figures 4
MANUFACTURER
DCI, Inc.
WEBSITE
www.dciincorporated.com
PART NUMBER
04-0924-00
04-0924-01
04-0925-00
04-0925-01
DESCRIPTION
3.5 digits, 5V
3.5 digits, 3V
4.5 digits, 5V
4.5 digits, 3V
The following site has links to other custom LCD manufacturers: www.earthlcd.com/mfr.htm
______________________________________________________________________________________
11
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