参数资料
| 型号： | MAX1494CCJ+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 22/34页 |
| 文件大小： | 0K |
| 描述： | IC ADC W/LCD DRIVER 32-TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 显示器类型： | LCD |
| 配置： | 7 段 + 2 个信号器 |
| 接口： | 串行 |
| 数字或字符： | A/D，4.5 位数字 |
| 电流 - 电源： | 960µA |
| 电源电压： | 2.7 V ~ 5.25 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 带卷 (TR) |
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3.5- and 4.5-Digit, Single-Chip ADCs
with LCD Drivers
Command Byte (Write Only):
MSB
LSB
Bit 7
START (1)
Bit 6
R/ W
Bit 5
RS4
Bit 4
RS3
Bit 3
RS2
Bit 2
RS1
Bit 1
RS0
Bit 0
X
START:
(R/ W ):
Start Bit. The first 1 clocked into the
MAX1492/MAX1494 is the first bit of the
command byte.
Read/ Write . Set this bit to 1 to read from
the specified register. Set this bit to 0 to
certain registers are read-only. Write com-
mands to a read-only register are
ignored.
(RS4–RS0): Register Address Bits. RS4 to RS0 specify
which register is accessed.
write to the selected register. Note that
Status Register (Read Only):
MSB
X:
Don’t care.
LSB
SIGN
OVER
UNDER
LOW_BATT
DRDY
0
0
0
Default values: 00h
This register contains the status of the conversion
results.
UNDER:
Underrange Bit. Latches high if an under-
range condition occurs (the ADC result is
SIGN:
OVER:
Latched Negative-Polarity Indicator.
Latches high when the result is negative.
Clears by reading the status register,
unless the condition remains true.
Overrange Bit. Latches high if an over-
range condition occurs (the ADC result is
larger than the value in the overrange reg-
less than the value in the underrange regis-
ter). Clears by reading the status register,
unless the condition remains true.
LOW_BATT: Low-Battery Bit. Latches high if the voltage
at the LOWBATT is lower than 2.048V (typ).
Clears by reading the status register,
unless the condition remains true.
ister). Clears by reading the status regis-
ter, unless the condition remains true.
DRDY:
Data-Ready Bit. Latches high to indicate
a completed conversion result with valid
data. Read the ADC Result-Register 1 to
clear this bit.
Control Register (Read/Write):
MSB
Bit 15
SPI/ ADC
Bit 14
EXTCLK
Bit 13
INTREF
Bit 12
DP_EN
Bit 11
DPSET2
Bit 10
DPSET1
Bit 9
PD_DIG
Bit 8
PD_ANA
LSB
Bit 7
HOLD
Bit 6
PEAK
Bit 5
RANGE
Bit 4
CLR
Bit 3
SEG_SEL
Bit 2
OFFSET_CAL1
Bit 1
OFFSET_CAL2
Bit 0
0
Default values: 0000h
This register is the primary control register for the
MAX1492/MAX1494. It is a 16-bit read/write register. It
is used to indicate the desired clock and reference
source. It sets the LCD controls, range modes, power-
down modes, offset calibration, and the reset register
function (CLR).
22
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