参数资料
型号: MAX15002ATL+T
厂商: Maxim Integrated Products
文件页数: 9/29页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 40-TQFNEP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 2
频率 - 最大: 2.2MHz
电源电压: 5.5 V ~ 23 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
MAX15002
Dual-Output Buck Controller with
Tracking/Sequencing
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
NAME
REG
SEL
PGND1
DL1
DREG1
LX1
DH1
BST1
CSN1
CSP1
ILIM1
COMP1
EN1
FB1
PGOOD1
PGND2
DL2
DREG2
LX2
FUNCTION
5V Regulator Output. Bypass with a 2.2μF ceramic capacitor to SGND.
Track/Sequence Select Input. At startup, connect SEL to REG to configure as a dual tracker or connect SEL
to SGND to configure as a dual sequencer. Note: When configured as a dual sequencer, each rail is
independently controlled by EN_.
Controller 1 Power-Ground Connection. Connect the input filter capacitor’s negative terminal, the source of
the synchronous MOSFET, and the output filter capacitor’s return to PGND1. Connect externally to SGND at
a single point near the input capacitor return terminal.
Controller 1 Low-Side Gate Driver Output. DL1 is the gate driver output for the synchronous MOSFET.
Controller 1 Low-Side Gate Driver Supply. Connect externally to REG and the anode of the boost diode.
Connect a minimum of 0.1μF ceramic capacitor from DREG1 to PGND1.
Controller 1 High-Side MOSFET Source Connection/Synchronous MOSFET Drain Connection. Connect the
inductor and the negative side of the boost capacitor to LX1.
Controller 1 High-Side Gate Driver Output. DH1 drives the gate of the high-side MOSFET.
Controller 1 High-Side Gate Driver Supply. Connect BST1 to the cathode of the boost diode and to the
positive terminal of the boost capacitor.
Controller 1 Negative Current-Sense Input. Connect CSN1 to the synchronous MOSFET drain (connected to
LX1). When using a current-sense resistor, connect CSN1 to the junction of a low-side MOSFET’s source
and the current-sense resistor. See Figure 10.
Controller 1 Positive Current-Sense Input. Connect CSP1 to the synchronous MOSFET source (connected to
PGND1). When using a current-sense resistor, connect CSP1 to the PGND1 end of the current-sense
resistor.
Controller 1 Valley Current-Limit Set Output. Connect a 25k ? to 150k ? resistor, R ILIM1 , from ILIM1 to SGND
to program the valley current-limit threshold from 50mV to 300mV. ILIM1 sources 20μA out to R ILIM1 . The
resulting voltage divided by 10 is the valley current-limit threshold. When using a precision current-sense
resistor, connect a resistive divider from REG to ILIM1 to SGND to set the valley current limit. See Figure 10.
Controller 1 Error Transconductance Amplifier Output. Connect COMP1 to the compensation feedback
network.
Controller 1 Enable Input. EN1 must be above 1.24V, V EN-TH , for the PWM controller to start Output 1.
Controller 1 is the master. Use the master as the highest output voltage in a coincident tracking
configuration.
Controller 1 Feedback Regulation Point. Connect to the center tap of a resistive divider from the converter
output to SGND to set the output voltage. The FB1 voltage regulates to V FB (0.6V).
Controller 1 Power-Good Output. Open-drain PGOOD1 output goes high impedance (releases) when FB1 is
above 0.925 x V FB (0.555V).
Controller 2 Power Ground Connection. Connect the input filter capacitor’s negative terminal, the source of
the synchronous MOSFET, and the output filter capacitor’s return to PGND2. Connect externally to SGND at
a single point near the input capacitor return terminal.
Controller 2 Low-Side Gate Driver Output. DL2 is the gate driver output for the synchronous MOSFET.
Controller 2 Low-Side Gate Driver Supply. Connect externally to REG and the anode of the boost diode.
Connect a minimum of a 0.1μF ceramic capacitor from DREG2 to PGND2.
Controller 2 High-Side MOSFET Source Connection/Synchronous MOSFET Drain Connection. Connect the
inductor and the negative side of the boost capacitor to LX2.
Maxim Integrated
9
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