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参数资料
| 型号： | MAX15066EWE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/21页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 16WLP |
| 产品培训模块： | Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.606 V ~ 14.4 V |
| 输入电压： | 4.5 V ~ 16 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 500kHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFBGA，WLCSP |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-WLP（2x2） |
MAX15066/MAX15166
High-Efficiency, 4A, Step-Down DC-DC
Regulators with Internal Power Switches
V OUT OUT ?
=
× ? 1 ?
R1 =× ? OUT ? 1 ?
? V ?
I L_PK LOAD +
= I
× ? I L HSCL L_SAT )
< min(I ,I
Thermal-Shutdown Protection
The devices contain an internal thermal sensor that limits
the total power dissipation in the device and protects
it in the event of an extended thermal fault condition.
When the die temperature exceeds +160 N C (typ), the
thermal sensor shuts down the device, turning off the
DC-DC converter and the LDO regulator to allow the
die to cool. The regulator softly resets by pulling COMP
low, discharging soft-start, turning off the high-side and
turning on the low-side, until the low-side zero-crossing
current threshold is reached. After the die temperature
falls by 20 N C (typ), the device restarts, using the soft-
start sequence.
Applications Information
Setting the Output Voltage
Connect a resistive divider (R1 and R2, see Figure 3)
from OUT to FB to GND to set the DC-DC converter
output voltage. Choose R1 and R2 so that the DC errors
due to the FB input bias current do not affect the output-
voltage accuracy. With lower value resistors, the DC
error is reduced, but the amount of power consumed in
the resistive divider increases. A typical trade-off value
for R2 is 10k I , but values between 5k I and 50k I are
acceptable. Once R2 is chosen, calculate R1 using:
R2
? V FB ?
where the feedback threshold voltage V FB = 0.606V
(typ). When regulating an output of 0.606V, short FB to
OUT and keep R2 connected from FB to GND.
Maximum/Minimum Voltage
Conversion Ratio
The maximum voltage conversion ratio is limited by the
maximum duty cycle (D MAX ):
where D MIN = f OSC x t ON(min) ; f OSC is 500kHz/350kHz
for the MAX15066/MAX15166, respectively, and t ON(min)
is typically 150ns. See the specifications in the Electrical
Characteristics table.
Inductor Selection
A larger inductor value results in reduced inductor ripple
current, leading to a reduced output ripple voltage.
However, a larger inductor value results in either a larger
physical size or a higher series resistance (DCR) and
a lower saturation current rating. Typically, the induc-
tor value is chosen to have current ripple equal to 30%
of load current. Choose the inductor with the following
formula:
? V
L ?
f SW × ? I L ? V IN ?
where f SW is the internally fixed switching frequency of
500kHz (MAX15066) or 350kHz (MAX15166), and D I L is
the estimated inductor ripple current ( D I L = LIR x I LOAD ,
where LIR is the inductor current ratio). In addition, the
peak inductor current, I L_PK, must always be below both
the minimum high-side current-limit value (7.7A, typ),
and the inductor saturation current rating, I L_SAT . Ensure
that the following relationship is satisfied:
1
2
Input Capacitor Selection
For a step-down converter, input capacitor C IN helps
reduce input ripple voltage, in spite of discontinuous
input AC current. Low-ESR capacitors are preferred to
minimize the voltage ripple due to ESR.
For low-ESR input capacitors, size C IN using the follow-
ing formula:
× OUT
V OUT
V IN
< D MAX +
D MAX × V DROP2 + (1 ? D MAX ) × V DROP1
V IN
C IN
=
I LOAD
f SW x ? V IN_RIPPLE
V
V IN
where V DROP1 is the sum of the parasitic voltage drops
in the inductor discharge path, including synchronous
rectifier, inductor, and PCB resistances. V DROP2 is an
absolute value and the sum of the resistances in the
charging path, including the high-side switch, inductor,
and PCB resistances.
The minimum voltage conversion ratio is limited by the
For high-ESR input capacitors, the additional ripple con-
tribution due to ESR ( D V IN_RIPPLE_ESR ) is calculated as
follows:
δV IN_RIPPLE = R ESR_IN (I LOAD + δI L /2)
where R ESR_IN is the ESR of the input capacitor. The
RMS input ripple current is given by:
V OUT
V DROP2
> D MIN MIN × + (1 ? D MIN ) × DROP1 ?
+ ? D
minimum duty cycle (D MIN ):
? V ?
V IN ? V IN V IN ?
Maxim Integrated
=
I RIPPLE I LOAD ×
V OUT × ( V IN ? V OUT )
V IN
13
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