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参数资料
| 型号： | MAX1531ETJ/V+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 12/33页 |
| 文件大小： | 0K |
| 描述： | IC PS CTRLR MULTI-OUTPUT 32WQFN |
| 标准包装： | 2,500 |
| 应用： | 五路电源监控器 |
| 电源电压： | 4.5 V ~ 28 V |
| 电流 - 电源： | 1.7mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-TQFN-EP（5x5） |
| 包装： | 带卷 (TR) |
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Multiple-Output Power-Supply
Controllers for LCD Monitors
Pin Description (continued)
MAX1530
23
24
25
26
PIN
MAX1531
23
24
25
26
NAME
DH
BST
SEQ
FREQ
FUNCTION
High-Side Gate Driver Output. DH drives the main switch of the step-down regulator. DH
swings from LX to BST.
Step-Down Regulator Boostrap Capacitor Connection for High-Side Gate Driver. Connect
a 0.1μF ceramic capacitor from BST to LX.
Sequence Control Input for LR2, LR3, LR4, and LR5. Controls the current sources and
switches that charge and discharge the capacitors connected to the ONL_ pins.
Oscillator Frequency Select Input. Connect FREQ to VL for 500kHz operation. Connect
FREQ to AGND for 250kHz operation.
Main Input Voltage (+4.5V to 28V). Bypass IN to AGND with a 1μF ceramic capacitor
27
27
IN
close to the pins. IN powers the VL linear regulator. Connect IN to the drain of the high-
side MOSFET (for current sense) through a 1 Ω resistor.
Internal 5V Linear Regulator Output. Connect a minimum 1μF ceramic capacitor from VL
28
28
VL
to AGND. Place the capacitor close to the pins. VL can supply up to 30mA for gate drive
and external loads. VL remains active when EN is low.
29
29
AGND
Analog Ground
Enable Input. This general-purpose on/off control input has an accurate 1.238V (typ) rising
threshold with 5% hysteresis. This allows EN to monitor an input voltage level or other
analog parameter. If EN is less than its threshold, then the main step-down and all linear
30
30
EN
regulators are turned off. VL and the internal reference remain active when EN is low. The
rising edge of EN clears any latched faults except for a thermal fault, which is cleared only
by cycling the input power. An internal filter with a 10μs time constant prevents short
glitches from accidentally clearing the fault latch.
Low-Voltage Logic Linear Regulator (LR1) Feedback Input. FBL1 regulates at 1.245V
31
31
FBL1
nominal. Connect FBL1 to the center tap of a resistive voltage-divider between LR1 output
AGND to set the output voltage. Place the divider close to the FBL1 pin. LR1 starts
automatically after the step-down converter soft-start ends.
Low-Voltage Logic Linear Regulator (LR1) Base Drive. Open drain of an internal N-channel
32
32
DRV1
MOSFET. Connect DRV1 to the base of an external PNP pass transistor. (See the Pass
Transistor Selection section.)
Overcurrent Protection Positive Input. CSH is also the supply input for the overcurrent
sense block. CSH and CSL can be used to sense any current in the application circuit and
to shut the device down in an overcurrent condition. This feature is typically used to
protect the main input or the input to one of the linear regulators since they do not have
—
5
CSH
their own current limits. Insert an appropriate sense resistor in series with the protected
input and connect CSH and CSL to its positive and negative terminals. The controller sets
the fault latch when V CSH - V CSL exceeds the 300mV (typ) overcurrent threshold. An
internal lowpass filter prevents large currents of short duration (less than 50μs) or noise
glitches from setting the latch. If the overcurrent protection is not used, connect CSH and
CSL to VL.
—
6
CSL
Overcurrent Protection Negative Input. See CSH above.
12
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