参数资料
型号: MAX16065ETM+
厂商: Maxim Integrated Products
文件页数: 26/62页
文件大小: 0K
描述: IC SYSTEM MANAGER 12CH 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
应用: 电源监控器,序列发生器
电源电压: 2.8 V ~ 14 V
电流 - 电源: 4.5mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 管件
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
External Fault ( EXTFAULT)
GPIO4 and GPIO8 are configurable as the external fault
input/output. When configured as push-pull, EXTFAULT
signals that a critical fault has occurred on one or more
monitored voltages or current. When configured as
open-drain, EXTFAULT can be asserted low by an exter-
nal circuit to trigger a critical fault. This signal can be
used to cascade multiple MAX16065/MAX16066s.
Two configuration bits determine the behavior of the
MAX16065/MAX16066 when EXTFAULT is pulled low
by some other device. Register bit r72h[5], if set to a
‘1’, causes the sequencer state machine to enter the
fault state, deasserting all the outputs, when EXTFAULT
is pulled low. When this happens, the flag bit r1Ch[5]
gets set to indicate the cause of the fault. If register bit
r6Dh[2] is set in addition to r72h[5], EXTFAULT going low
triggers a nonvolatile fault log operation.
Faults
The MAX16065/MAX16066 monitor the input (MON_)
channels and compare the results with an overvoltage
threshold, an undervoltage threshold, and a selectable
overvoltage or undervoltage early warning threshold.
Based on these conditions, the MAX16065/MAX16066
assert various fault outputs and save specific informa-
tion about the channel conditions and voltages into the
nonvolatile flash. Once a critical fault event occurs, the
failing channel condition, ADC conversions at the time of
the fault, or both can be saved by configuring the event
logger. The event logger records a single failure in the
internal flash and sets a lock bit that protects the stored
fault data from accidental erasure on a subsequent
power-up.
An overvoltage event occurs when the voltage at a moni-
tored input exceeds the overvoltage threshold for that
input. An undervoltage event occurs when the voltage
at a monitored input falls below the undervoltage thresh-
old. Fault thresholds are set in registers r48h to r6Ch as
shown in Table 15. Disabled inputs are not monitored for
fault conditions and are skipped over by the input mul-
tiplexer. Only the upper 8 bits of a conversion result are
compared with the programmed fault thresholds.
The general-purpose inputs/outputs (GPIO1 to GPIO8)
can be configured as ANY_FAULT outputs or dedicated
Fault1 and Fault2 outputs to indicate fault conditions.
These fault outputs are not masked by the critical fault
enable bits shown in Table 18. See the General-Purpose
Inputs/Outputs section for more information on configur-
ing GPIO_s as fault outputs.
Deglitch
Fault conditions are detected at the end of each conver-
sion. When the voltage on an input falls outside a moni-
tored threshold for one acquisition, the input multiplexer
remains on that channel and performs several succes-
sive conversions. To trigger a fault, the input must stay
outside the threshold for a certain number of acquisitions
as determined by the deglitch setting in r73h[6:5] and
r74h[6:5] (see Table 16).
Fault Flags
Fault flags indicate the fault status of a particular input.
The fault flag of any monitored input in the device can be
read at any time from registers r1Bh and r1Ch, as shown
in Table 17. Clear a fault flag by writing a ‘1’ to the appro-
priate bit in the flag register. Unlike the fault signals sent
to the fault outputs, these bits are masked by the critical
fault enable bits (see Table 18). The fault flag is only set
when the matching enable bit in the critical fault enable
register is also set.
If a GPIO_ is configured as an open-drain EXTFAULT
input/output, and EXTFAULT is pulled low by an external
circuit, bit r1Ch[5] is set.
If a fault occurs during the secondary sequence group,
the slot number where the failure occurred is stored
in r1Dh.
The SMBus Alert bit is set if the MAX16065/MAX16066
have asserted the SMBus Alert output. Clear by writing a
‘1’. See the SMBALERT section for more details.
26
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