参数资料
型号: MAX16065ETM+
厂商: Maxim Integrated Products
文件页数: 43/62页
文件大小: 0K
描述: IC SYSTEM MANAGER 12CH 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
应用: 电源监控器,序列发生器
电源电压: 2.8 V ~ 14 V
电流 - 电源: 4.5mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 管件
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
page is currently selected. The write byte procedure is
the following:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
bit (low).
3) The addressed slave asserts an ACK on SDA.
5)
6)
7)
8)
9)
The addressed slave asserts an ACK on SDA.
The master sends a REPEATED START condition.
The master sends the 7-bit slave address and a
read bit (high).
The addressed slave asserts an ACK on SDA.
The slave sends an 8-bit data byte.
4) The master sends an 8-bit memory address.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The master sends a STOP condition.
10) The master asserts a NACK on SDA.
11) The master sends a STOP condition.
If the memory address is not valid, it is NACKed by the
slave at step 5 and the address pointer is not modified.
When PEC is enabled, the Read Byte protocol becomes:
To write a single byte, only the 8-bit memory address
1)
The master sends a START condition.
and a single 8-bit data byte are sent. The data byte is
written to the addressed location if the memory address
is valid. The slave asserts a NACK at step 5 if the mem-
ory address is not valid.
When PEC is enabled, the Write Byte protocol becomes:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write
bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends an 8-bit memory address.
5) The active slave asserts an ACK on the data line.
6) The master sends an 8-bit data byte.
7) The slave asserts an ACK on the data line.
8) The master sends an 8-bit PEC byte.
9) The slave asserts an ACK on the data line (if PEC is
good, otherwise NACK).
10) The master generates a STOP condition.
Read Byte
The read byte protocol (see Figure 14) allows the master
device to read a single byte located in the default page,
extended page, or flash page depending on which page
is currently selected. The read byte procedure is the
following:
2) The master sends the 7-bit slave ID plus a write
bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends 8-bit memory address.
5) The active slave asserts an ACK on the data line.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave ID plus a read
bit (high).
8) The addressed slave asserts an ACK on the data line.
9) The slave sends 8 data bits.
10) The master asserts an ACK on the data line.
11) The slave sends an 8-bit PEC byte.
12) The master asserts a NACK on the data line.
13) The master generates a STOP condition.
Block Write
The block write protocol (see Figure 14) allows the mas-
ter device to write a block of data (1 byte to 16 bytes) to
memory. Preload the destination address by a previous
send byte command; otherwise the block write com-
mand begins to write at the current address pointer.
After the last byte is written, the address pointer remains
preset to the next valid address. If the number of bytes
to be written causes the address pointer to exceed 8Fh
1)
2)
3)
4)
The master sends a START condition.
The master sends the 7-bit slave address and a
write bit (low).
The addressed slave asserts an ACK on SDA.
The master sends an 8-bit memory address.
for configuration registers or configuration flash or FFh
for user flash, the address pointer stays at 8Fh or FFh,
respectively, overwriting this memory address with the
remaining bytes of data. The slave generates a NACK at
step 5 if the command code is invalid or if the device is
busy, and the address pointer is not altered.
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