参数资料
型号: MAX16065ETM+
厂商: Maxim Integrated Products
文件页数: 47/62页
文件大小: 0K
描述: IC SYSTEM MANAGER 12CH 48-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 43
应用: 电源监控器,序列发生器
电源电压: 2.8 V ~ 14 V
电流 - 电源: 4.5mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(6x6)
包装: 管件
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
REGISTERS
AND FLASH
MEMORY WRITE REGISTER
[LENGTH = 8 BITS]
MEMORY READ REGISTER
[LENGTH = 8 BITS]
01100
01011
01010
01001
01000
00111
00110
MUX 1
00101
MEMORY ADDRESS REGISTER
[LENGTH = 8 BITS]
00100
COMMAND
DECODER
USER CODE REGISTER
[LENGTH = 32 BITS]
IDENTIFICATION REGISTER
[LENGTH = 32 BITS]
BYPASS REGISTER
[LENGTH = 1 BIT]
00011
00000
11111
01001
01010
01011
01100
01000
00111
SETFLSHADD
RSTFLSHADD
SETUSRFLSH
RSTUSRFLSH
SAVE
REBOOT
V DB
INSTRUCTION REGISTER
[LENGTH = 5 BITS]
R PU
TDI
TMS
TCK
Figure 15. JTAG Block Diagram
TEST ACCESS PORT
(TAP) CONTROLLER
MUX 2
TDO
Pause-DR: Shifting of the test data registers halts while
in this state. All test data registers retain their previous
state. The controller remains in this state while TMS is
low. A rising edge on TCK with TMS high puts the con-
troller in the exit2-DR state.
Exit2-DR: A rising edge on TCK with TMS high while
in this state puts the controller in the update-DR state.
A rising edge on TCK with TMS low enters the shift-DR
state.
Update-DR: A falling edge on TCK while in the update-
DR state latches the data from the shift register path of
the test data registers into a set of output latches. This
prevents changes at the parallel output because of
changes in the shift register. On the rising edge of TCK,
the controller goes to the run-test/idle state if TMS is low
or goes to the select-DR-scan state if TMS is high.
Select-IR-Scan: All test data registers retain the previ-
ous states. The instruction register remains unchanged
during this state. With TMS low, a rising edge on TCK
moves the controller into the capture-IR state. TMS high
during a rising edge on TCK puts the controller back into
the test-logic-reset state.
Capture-IR: Use the capture-IR state to load the shift
register in the instruction register with a fixed value.
This value is loaded on the rising edge of TCK. If TMS is
high on the rising edge of TCK, the controller enters the
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47
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