参数资料
型号: MAX17080EVKIT+
厂商: Maxim Integrated Products
文件页数: 3/48页
文件大小: 0K
描述: KIT EVAL FOR MAX17080
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 3,非隔离
输入电压: 4 ~ 26 V
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX17080
AMD 2-/3-Output Mobile Serial
VID Controller
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, V IN = 12V, V CC = V DD = V IN3 = V SHDN = V PGD_IN = 5V, V DDIO = 1.8V, V OPTION = V GNDS_ = V AGND = V PGND ,
V FBDC _ = V FBAC_ = V OUT3 = V CSP_ = V CSN_ = 1.2V, all DAC codes set to the 1.2V code, T A = 0°C to +85°C , unless otherwise noted.
Typical values are at T A = +25 ° C.)
PARAMETER
Shutdown Supply Currents (V DD )
Shutdown Supply Current (V DDIO )
Shutdown Supply Current (IN3)
SYMBOL
CONDITIONS
SHDN = GND, T A = +25°C
SHDN = GND, T A = +25°C
SHDN = GND, T A = +25°C
MIN
TYP
0.01
0.01
0.01
MAX
1
1
1
UNITS
μA
μA
μA
INTERNAL DACs, SLEW RATE, PHASE SHIFT
Measured at FBDC_
for the core SMPSs;
DAC codes from
0.8375V to 1.5500V
-0.5
+0.5
%
measured at OUT3
DC Output Voltage Accuracy
(Note 1)
V OUT
for the NB SMPS;
30% duty cycle, no
DAC codes from
0.5000V to 0.8250V
-5
+5
load, V ILIM3 = V CC ,
mV
V OUT3 = V DAC3 +
12.5mV (Note 3)
DAC codes from
12.5mV to 0.4875V
-10
+10
OUT3 Offset
SMPS1 to SMPS2 Phase Shift
SMPS3 to SMPS1 and SMPS2
Phase Shift
V ILIM3 = V CC or 3.3V
V ILIM3 = 2V or GND
SMPS2 starts after SMPS1
SMPS3 starts after SMPS1 or SMPS2
12.5
6.25
50
180
25
mV
%
Degrees
%
Slew-Rate Accuracy
During
transition
R TIME = 143k , SR = 6.25mV/μs
R TIME = 35.7k to 357k ,
SR = 25mV/μs to 2.5mV/μs
-10
-15
+10
+15
%
Startup
1
mV/μs
FBAC_ Input Bias Current
FBDC_ Input Bias Current
Switching Frequency Accuracy
I FBAC _
I FBDC _
f OSC1,
f OSC2,
f OSC3
CSP_ = CSN_, T A = +25°C
T A = +25°C
R OSC = 143k (f OSC1 = f OSC2 = 300kHz
nominal, f OSC3 = 600kHz nominal)
R OSC = 71.4k (f OSC1 = f OSC2 = 600kHz
nominal, f OSC3 = 1.2MHz nominal) to
432k (f OSC1 = f OSC2 = 99kHz nominal,
-3
-250
-5
-7.5
+3
+250
+5
+7.5
μA
nA
%
f OSC3 = 199kHz nominal)
SMPS1 AND SMPS2 CONTROLLERS
DC Load Regulation
Line Regulation Error
Either SMPS, PWM mode, droop disabled;
zero to full load
Either SMPS, 4V < V IN < 26V
-0.1
0.03
%
%/V
GNDS_ Input Range
V GNDS_
Separate mode
-200
+200
mV
Separate: V OUT _/ V GNDS _ , -200mV V GNDS _
GNDS_ Gain
A GNDS_
+200mV; combined: V OUT / V GNDS_,
0.95
1.00
1.05
V/V
-200mV V GNDS_
+200mV
GNDS_ Input Bias Current
I GNDS _
T A = +25°C
-2
+2
μA
_______________________________________________________________________________________
3
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