参数资料
型号: MAX1889ETE+T
厂商: Maxim Integrated Products
文件页数: 18/32页
文件大小: 0K
描述: IC PWR SUP TRPL LCD 16-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 控制器,TFT LCD
输入电压: 2.7 V ~ 5.5 V
输出数: 3
输出电压: 2.7 V ~ 13 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WQFN 裸露焊盘
供应商设备封装: 16-TQFN-EP(5x5)
包装: 带卷 (TR)
Triple-Output TFT LCD Power Supply
with Fault Protection
Therefore, the dominant pole and the RHP zero deter-
mine the loop response of the step-up regulator. The fre-
quency of the dominant pole is:
zero-pole pair to the loop by connecting an RC network
from the FB pin to the main output (lead compensation).
The frequencies of the pole and zero for the lag com-
f P _ DOMINANT =
2 π ? R 4
R 1 + R 2 ?
1
2 π R L C
where R L is the load resistance and C is the output
capacitor. The frequency of the RHP zero is:
pensation are:
f P _ FB =
?
?
1
R 1 × R 2 ?
? C 1
( )
2 R
f Z _ FB =
f Z _ RHP = 1 - D
L
2 π L
1
2 π R 4 × C 1
The frequencies of the zero and pole for the lead com-
where D is the duty cycle, L is the inductance, and the
pensation are:
A DC = 20 log ? × × R L ?
( )
2 π ? R 3 + ? C 2
DC gain is given by:
? R 1 ( 1 ? D ) ?
? R 1 + R 2 R CS ?
where R CS is the internal current-sense resistor, and R1
and R2 are the feedback divider resistors in Figure 5.
f Z _ FF =
f P _ FF =
1
2 π R 2 + R 3 × C 2
1
? R 1 × R 2 ?
? R 1 + R 2 ?
However, adding lead or lag compensation (Figure 5)
can be useful to adjust the trade-off between stability
and transient response. If greater phase margin is need-
ed for stability, and lower bandwidth is acceptable, add
a pole-zero pair by connecting an RC network from the
FB pin to ground (lag compensation). Conversely, if
higher bandwidth is required for faster transient
response, and lower phase margin is acceptable, add a
The compensation resistors R3 and R4 change the AC
gain affecting the loop bandwidth and phase margin at
crossover. Reducing the bandwidth too much (FB com-
pensation) harms the transient response, while increas-
ing it too much harms phase margin and stability. As a
rule, start with R3 (or R4) approximately equal to half of
R1 (or R2). In a typical application, the compensation
capacitors C1 and C2 can be in the range between
100pF to 1000pF. Then, check the stability by monitoring
V IN
L
D
V MAIN
the transient response waveform when a pulsed load is
applied to the output.
LX
R2
R3
D1
Using Compensation for Improved Soft-Start
The digital soft-start of the main step-up regulator limits
the average input current during startup. In order to
MAX1889
FB
R1
C2
R4
C
R L
smooth out each step of the digital soft-start, add a low-
frequency lead compensation network (Figure 5). The
network effectively spreads out the switching pulses
and lowers the peak inductor currents.
The smoothing network is active only during soft-start
GND
PGND
Figure 5. External Compensation
C1
when the output voltage rises. Positive changes in the
output are instantaneously coupled to the FB pin
through D1 and feed-forward capacitor C2. This
arrangement generates a smoothly rising output volt-
age. When the output voltage reaches regulation, C2
charges up through R3 and D1 turns off. In most appli-
cations, the lead compensation is not needed and can
be disabled by making R3 large. With R3 > R2, the
pole and the zero in the compensation network are very
close to one another and cancel out.
18
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