参数资料
型号: MAX3107EAG+T
厂商: Maxim Integrated Products
文件页数: 41/52页
文件大小: 0K
描述: IC UART SPI/I2C 128 FIFO 24SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
特点: 内部振荡器
通道数: 4,QUART
FIFO's: 128 字节
规程: RS232,RS485
电源电压: 2.35 V ~ 3.6 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 标准包装
其它名称: MAX3107EAG+TDKR
SPI/I2C UART with 128-Word FIFOs
2) The master sends the 7-bit slave ID plus a write bit (low).
3) The addressed slave asserts an ACK on the data
line.
4) The master sends the 8-bit register address.
5) The slave asserts an ACK on the data line only if the
address is valid (NACK if not).
6) The master sends 8 bits of data.
7) The slave asserts an ACK on the data line.
8) Repeat steps 6 and 7 N - 1 times.
9) The master generates a STOP condition.
Single-Byte Read
With this operation the master sends an address and
receives 1 or 2 data bytes from the slave device
(Figure 20). The read byte procedure is as follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave ID plus a write bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
5) The active slave asserts an ACK on the data line only
if the address is valid (NACK if not).
6) The master sends a repeated START (Sr).
Figure 19. Burst Write Sequence
Figure 20. Read Byte Sequence
Figure 18. Write Byte Sequence
S
DEVICE SLAVE ADDRESS - W
A
8 DATA BITS - 1
BURST WRITE
A
REGISTER ADDRESS
A
8 DATA BITS - N
A
8 DATA BITS - 2
A
FROM MASTER TO STAVE
FROM SLAVE TO MASTER
P
S
Sr
DEVICE SLAVE ADDRESS - W
A
DEVICE SLAVE ADDRESS - R
READ SINGLE BYTE
A
REGISTER ADDRESS
A
8 DATA BITS
NA
FROM MASTER TO STAVE
FROM SLAVE TO MASTER
P
S
P
DEVICE SLAVE ADDRESS - W
A
8 DATA BITS
FROM MASTER TO STAVE
WRITE SINGLE BYTE
FROM SLAVE TO MASTER
A
REGISTER ADDRESS
A
46
Maxim Integrated
MAX3107
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