参数资料
| 型号： | MAX3140EEI+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 13/36页 |
| 文件大小： | 0K |
| 描述： | IC UART W/RS485 28-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| 特点： | 收发器 |
| FIFO's： | 8 字节 |
| 规程： | RS232，RS485 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-QSOP |
| 供应商设备封装： | 28-QSOP |
| 包装： | 管件 |
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MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
20
______________________________________________________________________________________
Table 3. READ CONFIGURATION Register Bit Assignment (D15, D14 = 0, 1)
14
1
T
6
0
ST
7
0
IR
15
2
DIN
0
DOUT
R
B2
BIT
3
0
B3
0
TEST
B0
1
0
B1
4
0
L
5
0
PE
10
0
RM
11
0
TM
8
0
RAM
9
0
PM
12
0
SHDNo
13
0
FEN
Notes:
bit 15: DOUT
R = 1, Data is available to be read from the receive register or
FIFO.
R = 0, Receive register and FIFO are empty.
bit 14: DOUT
T = 1, Transmit buffer is empty.
T = 0, Transmit buffer is full.
bit 13: DOUT
FEN = 0, FIFO is enabled
FEN = 1, FIFO is disabled
bit 12: DOUT
SHDNo = 1, Software shutdown is enabled.
SHDNo = 0, Software shutdown is disabled.
bit 11: DOUT
TM = 1, Transmit-buffer-empty interrupt is enabled.
TM = 0, Transmit-buffer-empty interrupt is disabled.
bit 10: DOUT
RM = 1, Data available in the receive register or FIFO interrupt
is enabled.
RM = 0, Data available in the receive register or FIFO interrupt
is disabled.
bit 9: DOUT
PM = 1, Parity-bit-received interrupt is enabled.
PM = 0, Parity-bit-received interrupt is disabled.
bit 8: DOUT
RAM = 1, Receiver-activity (shutdown mode)/Framing-error
(normal operation) interrupt is enabled.
RAM = 0, Receiver-activity (shutdown mode)/Framing-error
(normal operation) interrupt is disabled.
bit 7: DOUT
IR = 1, IrDA mode is enabled.
IR = 0, IrDA mode is disabled.
bit 6: DOUT
ST = 1, Transmit two stop bits.
ST = 0, Transmit one stop bit.
bit 5: DOUT
PE = 1, Parity is enabled for both transmit (state of Pt) and
receive.
PE = 0, Parity is disabled for both transmit and receive.
bit 4: DOUT
L = 1, 7-bit words (8-bit words if PE = 1)
L = 0, 8-bit words (9-bit words if PE = 1)
bit 3–0: DOUT
B3–B0 = XXXX Baud-Rate Divisor select bits. See Table 6.
bit 15, 14: DIN
0, 1 = Read Configuration
bit 13–1: DIN
Zeros
bit 0: DIN
If TEST = 1 and CS = 0, then RTS = 16xBaudCLK
TEST = 0, Disables TEST mode.
Bits 15 and 14 of the DOUT WRITE CONFIGURATION
word (R and T) are sent out of the MAX3140 along with
14 trailing zeros. The use of the R and T bits is optional,
but ignore the 14 trailing zeros.
Warning! The UART requires stable crystal oscillator
operation before configuration (typically ~25ms after
power-up). At power-up, compare the WRITE CONFIG-
URATION bits with the READ CONFIGURATION bits in
a software loop until both match. This ensures that the
oscillator is stable and the UART is configured correctly.
READ CONFIGURATION Register (D15, D14 = 0, 1)
Use the READ CONFIGURATION register to read back
the last configuration written to the UART. In this mode,
bits 15 and 14 of the DIN configuration word are
required to be 0 and 1, respectively, to enable the
READ CONFIGURATION mode. Clear bits 13–1 of the
DIN word. Bit 0 is the test bit to put the UART in test
mode (see the
Test Mode section). Table 3 shows the
bit assignment for the READ CONFIGURATION regis-
ter.
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