参数资料
型号: MAX3140EEI+
厂商: Maxim Integrated Products
文件页数: 7/36页
文件大小: 0K
描述: IC UART W/RS485 28-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
特点: 收发器
FIFO's: 8 字节
规程: RS232,RS485
电源电压: 4.75 V ~ 5.25 V
带IrDA 编码器/解码器:
带故障启动位检测功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 28-QSOP
供应商设备封装: 28-QSOP
包装: 管件
UART
The universal asynchronous receiver transmitter
(UART) interfaces the SPI/MICROWIRE-compatible syn-
chronous serial data from a microprocessor (P) to
asynchronous, serial-data communication ports (RS-
485, IrDA). Figure 10 shows the MAX3140 functional
diagram. Included in the UART function is an
SPI/MICROWIRE interface, a baud-rate generator, and
an interrupt generator.
SPI Interface
The MAX3140 is compatible with SPI, QSPI (CPOL = 0,
CPHA = 0), and MICROWIRE serial-interface standards
(Figure 11). The MAX3140 has a unique full-duplex
architecture that expects a 16-bit word for DIN and
simultaneously produces a 16-bit word for DOUT
regardless of which read/write register used. The DIN
stream is monitored for its first two bits to tell the UART
the type of data transfer being executed (see the
WRITE CONFIGURATION register, READ CONFIG-
URATION register, WRITE DATA register, and READ
DATA register sections). DIN (MOSI) is latched on
MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
______________________________________________________________________________________
15
RO
TXP
A
B
Y
Z
GND
DIN
CS
SCLK
DOUT
CTS
RTS
I/O
TX
IRQ
RX
X2
X1
9
4
9
99
Pt
Pr
SPI
INTERFACE
INTERRUPT
LOGIC
BAUD-RATE
GENERATOR
TX BUFFER
TX SHIFT REGISTSER
RX SHIFT REGISTSER
RX FIFO
RX BUFFER
DI
SRL
DE
H/F
RE
NOTE: SWITCH POSITIONS INDICATE H/F = GND
RXP
9
MAX3140
Figure 10. Functional Diagram
CS
SCLK
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
COMPATIBLE
WITH MAX3140
NOT COMPATIBLE
WITH MAX3140
DIN
MSB
13
14
12
11
10
9
8
7
6
5
4
3
2
1
LSB
DOUT
MSB
13
14
12
11
10
9
8
7
6
5
4
3
2
1
LSB
Figure 11. Compatible CPOL and CPHA Modes
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