参数资料
| 型号： | MAX3140EEI+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 34/36页 |
| 文件大小： | 0K |
| 描述： | IC UART W/RS485 28-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| 特点： | 收发器 |
| FIFO's： | 8 字节 |
| 规程： | RS232，RS485 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带CMOS： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-QSOP |
| 供应商设备封装： | 28-QSOP |
| 包装： | 管件 |
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MAX3140
SPI/MICROWIRE-Compatible UART with Integrated
True Fail-Safe RS-485/RS-422 Transceivers
_______________________________________________________________________________________
7
SWITCHING CHARACTERISTICS—SRL = GND
(VCC = +5V ±5%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25°C.)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Driver Disable Time from Low
tDLZ
100
ns
Driver Enable to Output Low
tDZL
150
ns
Driver Enable to Output High
tDZH
150
ns
Maximum Data Rate
fMAX
10
Mbps
Driver Disable Time from High
tDHZ
100
ns
Receiver Input to Output
tRPLH,
tRPHL
106
150
ns
|tRPLH - tRPHL| Differential
Receiver Skew
tRSKD
0±10
ns
Receiver Enable to Output Low
tRZL
20
50
ns
Driver Output Skew
|tDPLH - tDPHL|
Driver Input to Output
tDPLH
34
60
ns
tDSKEW
-2.5
±10
ns
Driver Rise or Fall Time
tDR, tDF
14
25
ns
Receiver Enable to Output High
tRZH
20
50
ns
Receiver Disable Time from Low
tRLZ
20
50
ns
Receiver Disable Time from
High
tRHZ
20
50
ns
Time to Shutdown
tSHDN
50
200
600
ns
Driver Enable from Shutdown to
Output High
tDZH(SHDN)
250
ns
Driver Enable from Shutdown to
Output Low
tDZL(SHDN)
250
ns
Receiver Enable from Shutdown
to Output High
tRZH(SHDN)
3500
ns
34
60
CONDITIONS
Figures 2 and 8, CL = 100pF, S2 closed
Figures 4 and 6, CL = 15pF, S1 closed
Figures 2 and 8, CL = 100pF, S1 closed
Figures 4 and 6, CL = 100pF, S1 closed
Figures 4 and 6, CL = 100pF, S2 closed
Figures 4 and 6, CL = 15pF, S2 closed
Figures 7 and 9,
|VID| ≥ 2.0V,
rise and fall time of VID
≤ 15ns
Figures 2 and 8, CL = 100pF, S2 closed
(Note 5)
Figures 7 and 9,
|VID| ≥ 2.0V,
rise and fall time of VID
≤ 15ns
Figures 2 and 8, CL = 100pF, S1 closed
Figures 4 and 6, CL = 15pF, S2 closed
Figures 4 and 6, CL = 15pF, S1 closed
Figures 2 and 8, CL = 100pF, S2 closed
Figures 3 and 5, RDIFF = 54
Ω,
CL1 = CL2 = 100pF
Receiver Enable from Shutdown
to Output Low
Figures 3 and 5, RDIFF = 54
Ω,
CL1 = CL2 = 100pF
tRZL(SHDN)
3500
Figures 3 and 5, RDIFF = 54
Ω,
CL1 = CL2 = 100pF
ns
Figures 2 and 8, CL = 100pF, S1 closed
tDPHL
Note 1: All currents into the device are positive; all currents out of the device are negative. All voltages are referred to device
ground unless otherwise noted.
Note 2:
ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when the Dl input changes state.
Note 3: The SRL pin is internally biased to VCC/2 by a 100k
Ω/100kΩ resistor-divider. It is guaranteed to be VCC/2 if left unconnected.
Note 4: Maximum current level applies to peak current just prior to foldback-current limiting; minimum current level applies during
current limiting.
Note 5: The device is put into shutdown by bringing RE high and DE low. If the enable inputs are in this state for less than 50ns, the
device is guaranteed not to enter shutdown. If the enable inputs are in this state for at least 600ns, the device is guaranteed
to have entered shutdown.
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| MAX3140EEI+ | 功能描述:UART 接口集成电路 SPI/uWire Compatible RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| MAX3140EEI+T | 功能描述:UART 接口集成电路 SPI/uWire Compatible RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| MAX3140EEI-T | 功能描述:UART 接口集成电路 RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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| MAX314C/D | 功能描述:模拟开关 IC 10Ohm Quad SPST CMOS Analog Switches RoHS:否 制造商:Texas Instruments 开关数量:2 开关配置:SPDT 开启电阻（最大值）:0.1 Ohms 切换电压（最大）: 开启时间（最大值）: 关闭时间（最大值）: 工作电源电压:2.7 V to 4.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-16 |
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