参数资料
型号: MAX5040EUB+T
厂商: Maxim Integrated Products
文件页数: 11/21页
文件大小: 0K
描述: IC CNTRLR VOLT TRACK 10-UMAX
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 处理器
电流 - 电源: 1.3mA
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-µMAX
包装: 带卷 (TR)
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
V IN (5V)
IN
I/O
POWER
OUT
V I/O = 3.3V AT 2.0A
I/O
SUPPLY
C I/O
CORE
SHDN
Q1
Si9428
SO-8
100 μ F
V CORE = 1.8V AT 2.0A
PowerPC/
DSP/ASIC
IN
POWER OUT
SUPPLY
SHDN
SDO
CORE
I/O
C CORE
100 μ F
C2
1.5nF
R1
10k ?
0.1%
R9
1k ?
5%
C3
22nF
R4
50 ?
CORE
C IN
1 μ F
R7
25.5k ?
1%
V CC
MAX5039
NDRV
C1
100nF
R3
10k ?
R2A
9.09k ?
0.1%
UVLO
CORE_FB
R8
10k ?
1%
GND
R2B
158 ?
1%
Figure 9. Typical Application Circuit for the MAX5039
Designing with MAX5039/MAX5040
The MAX5039/MAX5040 provide intelligent control to
power systems where two power supplies need track-
ing. Follow the steps below for designing with the
MAX5039/MAX5040:
1) Select an appropriate external N-channel MOSFET
(see the N-Channel MOSFET Selection section).
2) Set the CORE regulation voltage (see the Program-
ming the CORE Voltage section).
3) Set the UVLO voltage trip threshold (see the
Programming UVLO Voltage section).
4) Compensate the CORE linear regulator loop (see
the Linear Regulator Compensation section).
5) Set the POK voltage trip threshold (MAX5040 only,
see the Programming I/O_SENSE Voltage section).
Figures 9 and 10 show an application example.
Functional Description
S D O
SDO is the shutdown signal output. Connect SDO to the
CORE and I/O power-supply shutdown pins. SDO
allows the MAX5039/MAX5040 to control the turning on
and off of the external switching regulators or linear reg-
ulators that supply the CORE and I/O voltages. Using
this single control signal, the MAX5039/MAX5040 turn
the CORE and I/O power supplies on and off together,
minimizing the voltage differential between them.
SDO is low when:
? The voltage on the UVLO pin is below V UVCC
(1.230V).
? V CC is below the IC turn-on voltage threshold (2.43V).
? A fault condition is detected.
The MAX5039/MAX5040 prevent premature turn-on of
the CORE and I/O power supplies during power-up by
actively holding SDO low as soon as V CC rises above
0.9V, provided the condition for SDO to stay low is valid.
NDRV
NDRV controls the gate of the external N-channel MOSFET
(which is connected between the I/O and CORE voltages),
as needed, as long as V CC is within its operating range.
NDRV is driven high to V CC when V I/O < V CORE .
NDRV regulates the external MOSFET as a linear regu-
lator when V I/O > V CORE and V CORE_FB < V C_REF .
NDRV is driven low when V I/O > V CORE and V CORE_FB
> V C_REF .
______________________________________________________________________________________
11
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