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参数资料
| 型号： | MAX5040EUB+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/21页 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR VOLT TRACK 10-UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 处理器 |
| 电流 - 电源： | 1.3mA |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-µMAX |
| 包装： | 带卷 (TR) |
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
and off the CORE and I/O power supplies. The
MAX5039/MAX5040 monitor and compare the CORE
and I/O voltages as follows.
When the I/O voltage is greater than or equal to the
CORE voltage, MAX5039/MAX5040 regulate the exter-
nal N-channel MOSFET as a linear regulator by control-
ling NDRV. The linear regulator regulates the CORE
voltage to the value set by the external resistor-divider
connected from CORE to CORE_FB and GND (see
Figures 9 and 10). If the CORE_FB voltage is far less
than its regulation point, V C_REF (800mV), NDRV drives
high to V CC , effectively shorting CORE and I/O together
equals V C_REF , NDRV goes into regulation mode. If the
CORE_FB voltage is higher than V C_REF , the linear reg-
ulator goes into standby mode and pulls NDRV low,
turning off the external N-channel MOSFET.
When the I/O voltage is lower than the CORE voltage by
V TH (90mV), the MAX5039/MAX5040 turn the external N-
channel MOSFET on by driving NDRV high to V CC .
Whenever SDO is high, the MAX5039/MAX5040 track the
time that NDRV is in regulation mode or driven high. If
NDRV is in regulation mode or driven high for longer than
t FAULT (15ms), a fault occurs and SDO is pulled low.
through the external MOSFET. If the CORE_FB voltage
SYSTEM TURN-ON/TURN-OFF
SYSTEM FAULT STARTUP
(CORE SUPPLY FAILS TO TURN ON)
UNDER UVLO CONTROL
(V I/O RISING BEFORE V CORE )
NDRV
V CC
5V/div
UVLO
UVLO
5V/div
POK
SDO
V CC
NDRV
5V/div
SDO
5V/div
POK
SDO
SDO
5V/div
POK
5V/div
POK
NDRV
I/O
5V/div
NDRV
I/O
5V/div
I/O
I/O
CORE
AND CORE
2V/div
CORE
AND CORE
1V/div
4ms/div
Figure 5. System Power-Up/Power-Down, Fault Startup
(CORE Supply Fails to Turn On)
SYSTEM TURN-ON/TURN-OFF
2ms/div
Figure 6. System Turn-On/Turn-Off Under UVLO Control
(VI/O Rising Before VCORE)
UNDER UVLO CONTROL
(V CORE RISING BEFORE V I/O )
UVLO
UVLO
5V/div
SHORT-CIRCUIT RESPONSE
(CORE SHORTENED TO GND)
POK
SDO
SDO
5V/div
NDRV
NDRV
5V/div
NDRV
POK
5V/div
NDRV
POK
SDO
SDO
5V/div
POK
I/O
5V/div
I/O
5V/div
I/O
CORE
AND CORE
1V/div
CORE
I/O
AND CORE
1V/div
5ms/div
Figure 7. System Turn-On/Turn-Off Under UVLO Control
(V CORE Rising Before V I/O )
2ms/div
Figure 8. Short-Circuit Response (CORE Shorted to GND)
_______________________________________________________________________________________
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