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| 型号： | MAX5040EUB+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/21页 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR VOLT TRACK 10-UMAX |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 处理器 |
| 电流 - 电源： | 1.3mA |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 10-µMAX |
| 包装： | 带卷 (TR) |
Voltage-Tracking Controllers for
PowerPC, DSPs, and ASICs
Resistor tolerance error:
ERROR RESTOL (%) = RES_TOL (%) x 2 x (1-Ratio)
where:
A minimum but unspecified loop gain of 1000 yields a
-0.2% gain error. No positive gain error is possible.
Calculate the maximum and minimum regulator core
voltage set point as follows:
Ratio =
V C _ REF
V REGNOM
=
800 mV
V REGNOM
CORESET MAX = CORE MIN - TOL = (1.8V - 5%) - 2.5%
= 1.8V x 92.5% = 1.665V
CORESET MIN = I/O MAX - ? V I/OC + TOL
If the nominal CORE set point is 1.6V, the ratio is
800mV/1600mV = 0.5. With 1% resistors, the resistor
error is:
ERROR RESTOL (%) = ±1% x {2 x (1 - 0.5)} = ±1%
Resistor temperature coefficient error:
= ((3.3V + 5%) - 2V) + 2.5%
= (3.465V - 2V) x 102.5%
= 1.465V x 102.5% = 1.5016V
Set the CORE voltage set point (V REGNOM ) between
1.5016V and 1.665V and as close to the upper value
(1.665V) as possible.
ERROR RES - TCR = 100 ? Ratio ? 1 +
? ?
?
] ? ? ? - 1 ? ?
R 11 + ( )
? ?
?
?
? ?
R 2 [ 1 ? ( TCR × ? T ) ] ? ?
TCR × ? T
Connect the midpoint of a voltage-divider between
CORE and GND to CORE_FB, as shown in Figure 10.
Set the midpoint voltage to 800mV for a maximum
CORE voltage set point of 1.665V.
A similar value applies when the (+) and (-) are
reversed in the above quotient. TCR is expressed in
parts per million. One-percent chip resistors are typi-
Choose a value for R1 of 10k ? .
Calculate R2 with the following equation:
cally specified at ±100ppm while 0.1% resistors are
specified at ±25ppm.
Resistor Resolution Error: This error can be negligible
when R2 is split into two parts, a high-value 0.1% resistor
in series with a low-value 1% resistor to trim the final value.
Example:
R 2 =
R 1
V REGNOM
V C _ REF
- 1
MAX5039/MAX5040 reference error: ±2.0% by specifi-
= ? ? 10 k ?
cation.
Loop-gain error: This error is due to the finite system gain.
R 2 = R 1 =
R 2 × V C _ REF
V REGNOM - 1
? 0 . 8 V ?
? 1 . 665 V - 0 . 8 V ?
A OL × Ratio
? ( A OL × Ratio ) + 1
?
ERROR GAIN = 100 ?
?
-1 ?
?
= 9 . 24855 k ?
Using a standard 9.09k ? (±0.1%) resistor in series with
a 158 ? (1%) resistor yields negligible resolution error.
1000 × 0 . 5
? ( ) + 1
= 100 ?
?
1000 × 0 . 5
Table 1. Error Summation
?
-1 ?
?
Programming UVLO Voltage
See the application circuit examples in Figures 9 and 10.
The MAX5039/MAX5040 provide a user-programmable
undervoltage lockout feature through the UVLO pin.
ERROR SOURCE
Resistor Tolerance
Resistor TCR
(-40°C/+85°C)
Reference Voltage
Loop-Gain Error
Total = TOL
AMOUNT
(1% Res.)
(%)
±1.0
±0.55
±2.0
0 to -0.2
+3.55/-3.75
AMOUNT
(0.1% Res.) (%)
±0.1
±0.14
±2.0
0 to -0.2
+2.24/-2.44
When using a resistor-divider, R7 and R8, from an input
voltage rail (V IN ) to UVLO to GND, the user-program-
mable UVLO feature allows V IN to get to a certain value
before MAX5039/MAX5040 turn the system power sup-
plies on together. V IN is usually the input voltage to the
system power supplies and it can be the same as V CC .
The UVLO pin also provides the system a way to turn
on/off the system power supplies (see the UVLO sec-
tion). Choose the UVLO trip point such that the mini-
mum V IN voltage exceeds the maximum UVLO rising
16
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