参数资料
型号: MAX5952CUAX+
厂商: Maxim Integrated
文件页数: 21/50页
文件大小: 1006K
描述: IC PSE CNTRLR FOR POE 36-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 30
类型: 以太网供电控制器(PoE)
应用: 远程外设(工业控制,相机,数据访问)
内部开关:
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-BSOP(0.295",7.50mm 宽)
供应商设备封装: 36-SSOP
包装: 管件
High-Power, Quad, PSE Controller
for Power-Over-Ethernet
______________________________________________________________________________________   21
Digital Logic
V
DD
supplies power for the internal logic circuitry. V
DD
ranges from +3.0V to +5.5V and determines the logic
thresholds for the CMOS connections (SDAIN,
SDAOUT, SCL, AUTO, SHD_, A_). This voltage range
enables the MAX5952 to interface with a nonisolated
low-voltage microcontroller. The MAX5952 checks the
digital supply for compatibility with the internal logic.
The MAX5952 also features a V
DD
undervoltage lockout
(V
DDUVLO
) of +2.0V. A V
DDUVLO
condition keeps the
MAX5952 in reset and the ports shut off. Bit 0 in the
supply event register shows the status of V
DDUVLO
(Table 12) after V
DD
has recovered. All logic inputs and
outputs reference to DGND. DGND and AGND must be
connected together externally. Connect DGND to
AGND at a single point in the system as close as possi-
ble to the MAX5952.
Hardware Shutdown
SHD_ shuts down the respective ports without using
the serial interface. Hardware shutdown offers an emer-
gency turn-off feature that allows a fast disconnect of
the power supply from the port. Pull SHD_ low to
remove power. SHD_ also resets the corresponding
events and status register bits.
Interrupt
The MAX5952 contains an open-drain logic output (INT)
that goes low when an interrupt condition exists. R00h
and R01h (Tables 6 and 7) contain the definitions of the
interrupt registers. The mask register R01h determines
events that trigger an interrupt. As a response to an inter-
rupt, the controller reads the status of the event register
to determine the cause of the interrupt and takes subse-
quent actions. Each interrupt event register also contains
a Clear on Read (CoR) register. Reading through the
CoR register address clears the interrupt. INT remains
low when reading the interrupt through the read-only
addresses. For example, to clear a startup fault on the
port 4 read address 09h (see Table 11). Use the global
pushbutton bit in register 1Ah (bit 7, Table 23) to clear
interrupts, or use a software or hardware reset.
Undervoltage and
Overvoltage Protection
The MAX5952 contains several undervoltage and over-
voltage protection features. Table 12 in the Register
Map and Description section shows a detailed list of
the undervoltage and overvoltage protection features.
An internal V
EE
undervoltage lockout (V
EEUVLO
) circuit
keeps the MOSFET off and the MAX5952 in reset until
V
AGND
- V
EE
exceeds 29V for more than 3ms. An inter-
nal V
EE
overvoltage (V
EE_OV
) circuit shuts down the
ports when (V
AGND
- V
EE
) exceeds 60V. The digital
supply also contains an undervoltage lockout
(V
DDUVLO
). The MAX5952 also features three other
undervoltage and overvoltage interrupts: V
EE
undervolt-
age interrupt (V
EEUV
), V
DD
undervoltage interrupt
(V
DDUV
), and V
DD
overvoltage interrupt (V
DDOV
). A
fault latches into the supply events register (Table 12),
but the MAX5952 does not shut down the ports with
V
EEUV
, V
DDUV
, or V
DDOV
.
DC Disconnect Monitoring
Setting R13h[DCD_EN_] bits high enable DC load moni-
toring during a normal powered state. If V
RS
(the voltage
across R
S
) falls below the DC load disconnect threshold,
V
DCTH
, for more than t
DISC
, the device turns off power
and asserts the LD_DISC_ bit of the corresponding port.
AC Disconnect Monitoring
The MAX5952 features AC load disconnect monitoring.
Connect an external sine wave to OSC. The oscillator
requirements are:
1)  V
P-P
x Frequency = 200V
P-P
x Hz ?5%
2)  Positive peak voltage > +2V
3)  Frequency > 60Hz
A 100Hz ?0%, 2V
P-P
?%, with +1.2V offset (V
PEAK
=
+2.2V typical) is recommended.
The MAX5952 buffers and amplifies 3x the external
oscillator signal and sends the signal to DET_, where
the sine wave is AC-coupled to the output. The
MAX5952 senses the presence of the load by monitor-
ing the amplitude of the AC current returned to DET_
(see the Functional Diagram).
Setting R13h[ACD_EN_] bits high enable AC load dis-
connect monitoring during a normal powered state. If
the AC current peak at the DET_ input falls below I
ACTH
for more than t
DISC
, the device turns off power and
asserts the LD_DISC_ bit of the corresponding port.
I
ACTH
is programmable using R23h[0-3].
An internal comparator checks for a proper amplitude
of the oscillator input. If the positive peak of the input
sinusoid falls below a safety value of 2V, OSC_FAIL
sets and the port shuts down. Power cannot be applied
to the ports when ACD_EN is set high and OSC_FAIL is
set high. Leave OSC unconnected or connect it to
DGND when not using AC-disconnect detection.
Thermal Shutdown
If the MAX5952 die temperature reaches +150癈, an
overtemperature fault generates and the MAX5952
shuts down. The MOSFETs turn off. The die tempera-
ture of the MAX5952 must cool down below 130癈 to
remove the overtemperature fault condition. After a
thermal shutdown, the part is reset.
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