参数资料
型号: MAX6874ETJ
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 电源管理
英文描述: EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors
中文描述: 6-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC32
封装: 7 X 7 MM, 0.80 MM HEIGHT, MO-220, TQFN-32
文件页数: 19/40页
文件大小: 337K
代理商: MAX6874ETJ
MAX6874/MAX6875
EEPROM-Programmable, Hex/Quad,
Power-Supply Sequencers/Supervisors
26
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Repeated START Conditions
A REPEATED START (SR) condition may indicate a
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
read operation (see Figure 7). SR may also be used
when the bus master is writing to several I2C devices
and does not want to relinquish control of the bus. The
MAX6874/MAX6875 serial interface supports continu-
ous write operations with or without an SR condition
separating them. Continuous read operations require
SR conditions because of the change in direction of
data flow.
Acknowledge
The acknowledge bit (ACK) is the 9th bit attached to any
8-bit data word. The receiving device always generates
an ACK. The MAX6874/MAX6875 generate an ACK
when receiving an address or data by pulling SDA low
during the 9th clock period (Figure 5). When transmitting
data, such as when the master device reads data back
from the MAX6874/MAX6875, the MAX6874/MAX6875
wait for the master device to generate an ACK.
Monitoring ACK allows for detection of unsuccessful data
transfers. An unsuccessful data transfer occurs if the
receiving device is busy or if a system fault has
occurred. In the event of an unsuccessful data transfer,
the bus master should reattempt communication at a
later time. The MAX6874/MAX6875 generate a NACK
after the slave address during a software reboot, while
writing to the EEPROM, or when receiving an illegal
memory address.
Slave Address
The MAX6874 slave address conforms to the following
table:
The MAX6875 slave address conforms to the following
table:
SA7 through SA4 represent the standard interface
address (1010) for devices with EEPROM. SA3 and
SA2 correspond to the A1 and A0 address inputs of the
MAX6874/MAX6875 (hardwired as logic low or logic
high). A1 is internally set to 0 for the MAX6875. SA0 is a
read/write flag bit (0 = write, 1 = read).
The A0 and A1 address inputs allow up to four
MAX6874s or two MAX6875s to connect to one bus.
Connect A0 and A1 to GND or to the serial interface
power supply (see Figure 6).
SA7
(MSB)
SA6
SA5
SA4
SA3
SA2
SA1
SA0
(LSB)
1
010
A1
A0
X
R/W
X = Don’t care.
SA7
(MSB)
SA6
SA5
SA4
SA3
SA2
SA1
SA0
(LSB)
1
0100
A0
X
R/W
X = Don’t care.
SCL
1
S
2
89
SDA BY
TRANSMITTER
SDA BY
RECEIVER
START
CONDITION
CLOCK PULSE FOR ACKNOWLEDGE
Figure 5. Acknowledge
相关PDF资料
PDF描述
MAX6876ETX EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit
MAX6884ETP EEPROM-Programmable, Hex, Power-Supply Supervisors with an ADC
MAX6884ETP-T EEPROM-Programmable, Hex, Power-Supply Supervisors with an ADC
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MAX6874TCC+ 制造商:Maxim Integrated Products 功能描述:
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