参数资料
型号: MAX769EEI+
厂商: Maxim Integrated Products
文件页数: 10/16页
文件大小: 0K
描述: IC PAGER SYSTEM 28-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 手持/移动设备
电流 - 电源: 4µA
电源电压: 1.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-QSOP
供应商设备封装: 28-QSOP
包装: 管件
2 or 3-Cell, Step-Up/Down,
Two-Way Pager System IC
2 OR 3-CELL
AA ALKALINE
R1
BATTERY
26
C5
22 μ F
1
L1
68 μ H
D1
MBR0520L
1M
BATT
LX1
R EG 1
R5
R2
250k
11
LBI
LX2
OUT
PGND
28
25
4
C1
47 μ F
C6
0.1 μ F
270k
A/D IN
SERIAL
I/O
9
27
5
2
3
6
LBO
CH0
CS
SCL
SDI
SDO
MAX769
REG1
R2IN
OFS
24
22
14
C OFS
0.1 μ F
C2
10 μ F
R OFS , 15k
3.0V
LOGIC
TO μ C
1.8 ?
DRIVERS
38.4kHz
C10
22nF
10k
17
19
18
16
13
12
C9
1nF
8
C8
1 μ F
DR1
DR2
DR2IN
DRGND
SYNC
FILT
REF
AGND
15
REG2
REG3
RSIN
RSO
NICD
21
20
10
7
23
C3
10 μ F
C4
1 μ F 100k
TO RF
PA
3-CELL
RESET
2.85V
ANALOG
1V RCVR
R3
1.3M
R4
470k
NiCd
Figure 2. Standard Application Circuit
7-Bit ADC (CH0 Input and CH1, CH2)
Three analog channels are compared to a 7-bit, serially
programmed digital-to-analog converter (CH DAC). The
CH DAC voltage can be varied in 10mV steps from
200mV to V REF - 1LSB (or 1.27V) (Table 1). CH0 is an
external input, while CH1 and CH2 are signals internally
generated from the NICD and BATT pins. NICD and
BATT are internally divided by four before being com-
pared to CH DAC. The comparison threshold voltages
for each channel are described in the following equa-
tions:
V TH (CH0: pin 9) = D x 10mV
V TH (CH1: NICD) = D x 40mV
V TH (CH2: BATT) = D x 40mV
where D is the decimal equivalent of the binary code
DAC0–DAC6 (Table 1). DAC0 is the LSB. A DAC code
of 1111111 equates to D = 127. When all zeros are pro-
grammed, the CH DAC and CH_ comparators turn off.
CH0, CH1, and CH2 comparison results reside in the
three MSB locations of the output serial data (Table 4).
The CH_ OUT data is delayed by one read cycle. In
other words, each CH_ OUT bit is the result of the com-
parison made against the CH DAC voltage programmed
during the previous serial-write operation.
An analog-to-digital (A/D) conversion can be performed
on a channel by using the system software to step
through a successive-approximation routine or, if the
input is partially known, by setting the CH DAC to a
voltage near the estimated point and checking succes-
sive CH_ OUT bits.
10
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