参数资料
型号: MAX769EEI+
厂商: Maxim Integrated Products
文件页数: 5/16页
文件大小: 0K
描述: IC PAGER SYSTEM 28-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
应用: 手持/移动设备
电流 - 电源: 4µA
电源电压: 1.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-QSOP
供应商设备封装: 28-QSOP
包装: 管件
2 or 3-Cell, Step-Up/Down,
Two-Way Pager System IC
ELECTRICAL CHARACTERISTICS (continued)
(OUT = 3.0V, BATT = 3.6V, T A = -40°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)
PARAMETER
CH2 Input Hysteresis (Note 16)
CONDITIONS
MIN
4
TYP
8
MAX
16
UNITS
mV
CH0 Input Current
CH Comparator Response Time
(Note 16)
CH0 = 0.2V to 1.27V
10mV overdrive
-100
0.6
100
1.0
nA
μs
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Specifications to -40°C are guaranteed by design, not production tested.
This is not a tested parameter, since the IC is powered from OUT, not BATT.
Minimum start-up voltage is tested by determining when the LX pins can draw at least 15mA for 0.5μs (min) at a 285kHz
(min) repetition rate. This guarantees that the IC will deliver at least 200μA at the OUT pin.
This supply current is drawn from the OUT pin. Current drain from the battery depends on voltages at BATT and OUT and
on the DC-to-DC converter’s efficiency.
Current into BATT pin in addition to the supply current at OUT. This current is roughly constant from Coast to Run Mode.
Current into NICD pin when NICD isn’t being charged and isn’t regulating OUT.
Current into NICD pin when NICD is regulating OUT. Doesn’t include current drawn from OUT by the rest of the circuit.
Measured by setting the OUT regulation point to 2.8V and holding OUT at 3.0V.
Current into the NICD pin when BATT and OUT are both at 0V. This test guarantees that NICD won’t draw significant cur-
rent when the main battery is removed and backup is not activated.
Serial-interface timing specifications are not tested and are provided for design guidance only. Serial-interface functionali-
ty is tested by clocking data in at 5MHz with a 50% duty-cycle clock and checking for proper operation. With OUT set
below 2.5V, the serial-interface clock frequency should be reduced to 1MHz to ensure proper operation.
This specification is not directly tested but is guaranteed by correlation to LX on-resistance and current-limit tests.
Measured by using the internal feedback network and Coast-Mode error comparator to regulate OUT. Doesn’t include
ripple voltage due to inductor currents.
Measured by using the internal feedback network and Run-Mode error comparator to regulate OUT. Doesn’t include ripple
voltage due to inductor currents.
Uses the OUT measurement techniques described for the OUT error, Coast Mode, and OUT error Run Mode specifica-
tions.
The on-resistance is for either LX1 or LX2.
PLL acquisition characteristics depend on the impedance at the FILT pin. The specification is not tested and is provided
for design guidance only.
The limits in this specification are not guaranteed and are provided for design guidance only.
Typical Operating Characteristics
(T A = +25°C, unless otherwise noted.)
100
EFFICIENCY vs. LOAD CURRENT
(RUN MODE, V OUT = 3.0V)
V IN = 1.5V V IN = 2.0V
100
EFFICIENCY vs. LOAD CURRENT
(COAST MODE, V OUT = 3.0V)
100
EFFICIENCY vs. LOAD CURRENT
(COAST MODE, V OUT = 2.4V)
90
80
70
60
V IN = 5.0V
V IN = 3.5V
90
80
70
60
V IN = 5.0V
V IN = 3.5V
V IN = 2.5V
V IN = 2.0V
V IN = 1.5V
90
80
70
60
V IN = 5.0V
V IN = 3.5V
V IN = 2.5V
V IN = 2.0V
V IN = 1.5V
V IN = 2.5V
50
50
50
1
10
100
0.01
0.1
1
10
100
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
_______________________________________________________________________________________
5
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