参数资料
型号: MAX8702ETP+T
厂商: Maxim Integrated
文件页数: 10/14页
文件大小: 0K
描述: IC DRVR MOSFET DUAL 20-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 25ns
电流 - 峰: 1.5A
配置数: 4
输出数: 4
电源电压: 4.5 V ~ 28 V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
供应商设备封装: 20-TQFN-EP(4x4)
包装: 带卷 (TR)
Dual-Phase MOSFET Drivers
with Temperature Sensor
? V
? ? I
?
PD ( N H RESISTIVE ) = ? OUT ? ? LOAD ? R DS ( ON )
PD ( N H IN ( MAX ) ) 2 ? RSS SW ? ? LOAD ?
SWITCHING ) = ( V
A 10 ° C hysteresis keeps the output from oscillating
when the temperature is close to the threshold. The
thermal trip point is programmable up to +160 ° C
through an external resistor between TSET and AGND.
Use the following equation to determine the value of
the resistor:
R TSET = (85,210 / T) – (745,200 / T 2 ) – 195
where R TSET is the value of the set-point resistor in k ?
and T is the trip-point temperature in Kelvin.
The MAX8702 and MAX8703 include a thermal-shut-
down circuit that is independent of the temperature
sensor. The thermal shutdown has a fixed threshold of
+160 ° C (typ) with 10 ° C of thermal hysteresis. When the
die temperature exceeds +160 ° C, DH is pulled low and
DL is pulled high. The driver automatically resets when
the die temperature drops by +10 ° C.
Applications Information
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N H ) must be able to dissipate
the resistive losses plus the switching losses at both
V IN(MIN) and V IN(MAX) . Calculate both of these sums.
Ideally, the losses at V IN(MIN) should be roughly equal
to losses at V IN(MAX) , with lower losses in between. If
the losses at V IN(MIN) are significantly higher than the
losses at V IN(MAX) , consider increasing the size of N H
(reducing R DS(ON) but increasing C GATE ). Conversely,
if the losses at V IN(MAX) are significantly higher than the
losses at V IN(MIN) , consider reducing the size of N H
(increasing R DS(ON) but reducing C GATE ). If V IN does
not vary over a wide range, the minimum power dissi-
pation occurs where the resistive losses equal the
switching losses.
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (R DS(ON) ), comes in a moderate-
sized package (i.e., one or two SO-8s, DPAK, or
D 2 PAK), and is reasonably priced. Ensure that the DL
gate driver can supply sufficient current to support the
case power dissipation due to resistance occurs at the
minimum input voltage:
2
? V IN ? ? n TOTAL ?
where n TOTAL is the total number of phases.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R DS(ON) required to stay within package
power dissipation often limits how small the MOSFETs
can be. Again, the optimum occurs when the switching
losses equal the conduction (R DS(ON) ) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N H ) due to switching losses is difficult since
it must allow for difficult quantifying factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching-loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
ing verification using a thermocouple mounted on N H :
? C f ? ? I ?
? I GATE ? ? n TOTAL ?
where C RSS is the reverse transfer capacitance of N H
and I GATE is the peak gate-drive source/sink current
(5A typ).
Switching losses in the high-side MOSFET can
become an insidious heat problem when maximum AC
adapter voltages are applied, due to the squared term
in the C × V IN 2 × f SW switching-loss equation. If the
high-side MOSFET chosen for adequate R DS(ON) at
low battery voltages becomes extraordinarily hot when
biased from V IN(MAX) , consider choosing another
MOSFET with lower parasitic capacitance.
For the low-side MOSFET (N L ), the worst-case power
dissipation always occurs at the maximum input voltage:
PD ( N L RESISTIVE ) = ? 1 ? ?
? V IN ( MAX ) ? ?
? I LOAD ?
? n TOTAL ?
gate charge and the current injected into the parasitic
gate-to-drain capacitor caused by the high-side MOS-
FET turning on; otherwise, cross-conduction problems
can occur.
? ? V OUT ? ?
?
? ?
? ? R DS ( ON )
2
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N H ), the worst-
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I LOAD(MAX) but are not quite high enough to exceed
10
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