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参数资料
| 型号： | MAX8707ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/37页 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR MULTIPHASE 40TQFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，AMD Hammer CPU 电源 |
| 输入电压： | 4.5 ~ 5.5 V |
| 输出数： | 4 |
| 输出电压： | 0.8 ~ 1.55 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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Multiphase, Fixed-Frequency Controller for
AMD Hammer CPU Core Power Supplies
Pin Description (continued)
PIN
11
12
NAME
OSC
GNDS
FUNCTION
Oscillator Select Input. OSC is a 3-level logic input for selecting the per-phase switching frequency.
Connect to GND for 200kHz, connect to REF for 300kHz, or connect to V CC for 600kHz per phase.
Ground Remote-Sense Input. Connect GNDS directly to the CPU ground-sense pin. GNDS internally
connects to an amplifier that adjusts the output voltage, compensating for voltage drops from the regulator
ground to the load ground.
Slew-Rate Adjustment Pin. Connect a resistor from TIME to GND to set the internal slew rate. A 47k ? to
392k ? corresponds to slew rates of 19mV/μs to 2.28mV/μs, respectively, for all suspend voltage
transitions.
13
TIME
t TRAN ( SUS ) =
| V NEW ? V OLD |
dV TARGET / dt
where dV TARGET / dt = 6.25mV/μs × 143k ? / R TIME is the slew rate. For soft-start and shutdown, the
controller automatically reduces the slew rate by 1/4th. For all dynamic VID transitions, the rate at which
the VID inputs (D0 – D4) are clocked sets the slew rate, as long as it is less than the dv/dt set by R TIME .
Peak Inductor Current-Limit Threshold Adjustment (Cycle-by-Cycle Current Limit). If the voltage across the
current-sense inputs (CSP to CSN) exceeds the peak current-limit threshold, the controller immediately
terminates the respective phase ’ s on-time. Connect a resistor R ILIM(PK) from ILIM(PK) to GND to set the
cycle-by-cycle peak current-limit threshold:
14
ILIM(PK)
R ILIM ( PK ) =
8 V × R TRC
I PKLIMIT R CS
where R CS is the resistance value of the current-sense element (inductors ’ DCR or current-sense resistor),
R TRC is the resistance between TRC and REF, and I PKLIMIT is the desired peak current limit (per phase).
? ?
= A
R TRC CS ?
?
15
16
CCV
TRC
Voltage Integrator Capacitor Connection. Connect a 470pF x (4 / η PH ) or greater capacitor from CCV to
analog ground (GND) to set the integration time constant.
Transient-Voltage Preamplifier Output. Connect a resistor (R TRC ) between TRC and REF to set the
transient droop based on the voltage-positioning requirements. TRC does not affect the DC steady-state
droop. Choose R TRC based on the equation:
R TRANS R CS
? η PH R DROOP ( AC ) ?
as defined in the Design Procedure (page 33). If voltage positioning is not required, R TRC is determined
by the stability requirements. TRC is high impedance in shutdown.
14
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