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| 型号： | MAX8707ETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 24/37页 |
| 文件大小： | 0K |
| 描述： | IC CNTRLR MULTIPHASE 40TQFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，AMD Hammer CPU 电源 |
| 输入电压： | 4.5 ~ 5.5 V |
| 输出数： | 4 |
| 输出电压： | 0.8 ~ 1.55 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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Multiphase, Fixed-Frequency Controller for
AMD Hammer CPU Core Power Supplies
t TRAN ( START ) = t TRAN ( SHDN ) =
4 V TARGET
dV TARGET / dt
When exiting deeper sleep (SUS pulled low), the
MAX8707 starts to slew the internal target up towards
the new target. The controller remains in skip mode
while the output voltage is higher than the internal tar-
For all dynamic VID transitions, the rate at which the
VID inputs (D0 – D4) are clocked sets the slew rate, with
a maximum slew-rate limit set by the R TIME value. The
practical range of R TIME is 47k ? to 392k ? correspond-
ing to slew rates of 19mV/μs to 2.28mV/μs, respectively.
The output voltage tracks the slewed target voltage,
making the transitions relatively smooth.
The average inductor current per phase required to
make an output-voltage transition is:
get. As the internal target approaches the output volt-
age, the MAX8707 activates all enabled phases
( DRSKP driven high) so the output voltage may be
ramped up at the slew rate set by R TIME . The controller
blanks VROK (forced high impedance) until 20μs after
the transition is completed.
Forced-PWM Operation (Normal Mode)
During soft-start, soft-shutdown, and normal operation —
when the CPU is actively running (SKIP = low, Table 5) —
I L ?
C OUT
η PH
× ( dV TARGET / dt )
the MAX8707 operates with a low-noise, forced-PWM con-
trol scheme. Forced-PWM operation forces DRSKP high,
instructing the drivers to disable their zero-crossing com-
parators and force the low-side gate-drive waveforms to
where dV TARGET / dt is the required slew rate, C OUT is
the total output capacitance, and η PH is the number of
active phases.
Suspend Transition
(Forced-PWM Operation Selected)
When the MAX8707 enters suspend mode while config-
ured for forced-PWM operation (SKIP pulled low), the
controller ramps the output voltage down to the pro-
grammed SUSV voltage at the slew rate determined by
R TIME . The controller blanks VROK (forced high imped-
ance) until 20μs after the transition is completed — internal
target voltage equals the SUSV voltage. After this blank-
ing time expires, the controller automatically shuts down
phases 2, 3, and 4 ( DRSKP pulled low), and enters sin-
gle-phase, pulse-skipping operation. VROK monitors only
the lower threshold in skip mode.
When exiting suspend mode (SUS pulled low), the
MAX8707 immediately activates all enabled phases
( DRSKP driven high) so the output voltage may be
ramped up at the slew rate set by R TIME . The controller
blanks VROK (forced high impedance) until 20μs after
the transition is completed — internal target voltage
equals the selected VID-DAC voltage.
Suspend Transition
(Pulse-Skipping Operation Selected)
If the MAX8707 is configured for pulse-skipping opera-
tion (SKIP = high) when SUS goes high, the MAX8707
immediately disables phases 2, 3, and 4 ( DRSKP pulled
low) and enters pulse-skipping operation ( Figure 5). The
output drops at a rate determined by the load and the
output capacitance. The internal target still ramps as
before, and VROK remains high impedance until the
new target is reached plus an extra 20μs. After this time
expires, VROK monitors only the lower threshold.
constantly be the complement of the high-side gate-drive
waveforms. This keeps the switching frequency constant
and allows the inductor current to reverse under light
loads, providing fast, accurate negative output-voltage
transitions by quickly discharging the output capacitors.
Forced-PWM operation comes at a cost: the no-load +5V
bias supply current remains between 10mA to 200mA
per phase, depending on the external MOSFETs and
switching frequency. To maintain high efficiency under
light-load conditions, the controller switches to a low-
power pulse-skipping control scheme after entering sus-
pend mode.
Light-Load Pulse-Skipping Operation
The MAX8707 includes a light-load operating-mode con-
trol input (SKIP) used to disable extra phases and
enable/disable the driver ’ s zero-crossing comparator.
When the driver ’ s zero-crossing comparators are enabled
( DRSKP pulled low), the controller forces PWM_ low for
the disabled phases so the driver pulls DL_ low when its
current-sense inputs detect zero inductor current. This
keeps the inductor from discharging the output capaci-
tors and forces the controller to skip pulses under light-
load conditions to avoid overcharging the output. When
the zero-crossing comparators are disabled, each con-
troller maintains PWM operation under light-load condi-
tions (forced PWM).
After the MAX8707 enters suspend mode while config-
ured for forced-PWM operation (SKIP pulled low), the
controller automatically switches to the pulse-skipping
control scheme 20μs after the target voltage reaches
the programmed SUSV voltage.
When pulse-skipping operation is enabled, the con-
troller terminates the on-time when the output voltage
exceeds the feedback threshold and when the current-
24
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