参数资料
型号: MAX8707ETL+T
厂商: Maxim Integrated Products
文件页数: 23/37页
文件大小: 0K
描述: IC CNTRLR MULTIPHASE 40TQFN
标准包装: 2,500
应用: 控制器,AMD Hammer CPU 电源
输入电压: 4.5 ~ 5.5 V
输出数: 4
输出电压: 0.8 ~ 1.55 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 带卷 (TR)
Multiphase, Fixed-Frequency Controller for
AMD Hammer CPU Core Power Supplies
Table 4. AMD Hammer Output-Voltage VID DAC Codes (SUS = GND)
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
OUTPUT VOLTAGE
(V)
1.550
1.525
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
D4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
OUTPUT VOLTAGE
(V)
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
0.900
0.875
0.850
0.825
0.800
No CPU*
* No-CPU Mode: The controller enters the no-CPU mode by ramping down the output voltage to 0V with the shutdown slew rate.
When exiting the no-CPU mode, the controller ramps the output up to the new VID output voltage using the startup slew rate. In no-
CPU mode, the controller remains in standby so VID transitions may be detected.
ideal transitions, guaranteeing just-in-time arrival at the
new output-voltage level with the lowest possible peak
currents for a given output capacitance.
At the beginning of an output-voltage transition, the
MAX8707 blanks both VROK thresholds, preventing the
VROK open-drain output from changing states during
the transition. The controller enables the lower VROK
threshold approximately 20μs after the slew-rate con-
troller reaches the target output voltage, but the upper
VROK threshold is enabled only if the controller remains
in forced-PWM operation. If the controller enters pulse-
skipping operation, the upper VROK threshold remains
The MAX8707 automatically controls the current to the
minimum level required to complete the transition in the
calculated time. The slew-rate controller uses an inter-
nal capacitor and current source programmed by
R TIME to transition the output voltage. The total transi-
tion time depends on R TIME , the voltage difference, and
the accuracy of the slew-rate controller (C SLEW accura-
cy). The slew rate is not dependent on the total output
capacitance, as long as the surge current is less than
the current limit set by ILIM(AVE) and ILIM(PK). For
voltage transitions into and out of suspend mode, the
transition time (t TRAN ) is given by:
blanked. The slew-rate (set by resistor R TIME ) must be
set fast enough to ensure that the transition can be
completed within the maximum allotted time.
t TRAN ( SUS ) =
| V NEW - V OLD |
dV TARGET / dt
When transitions occur in pulse-skipping mode, the
MAX8707 sets OVP to 1.75V and disables the integrator
at the beginning of all transitions. OVP remains at 1.75V
and the integrator remains disabled until 20μs after the
transition is completed (internal target settles) and the
output is in regulation (an error-comparator edge is
detected).
where dV TARGET / dt = 6.25mV/μs × 143k ? / R TIME is
the slew rate, V OLD is the original output voltage, and
V NEW is the new target voltage. See TIME Slew-Rate
Accuracy in the Electrical Characteristics for t SLEW lim-
its. For soft-start and shutdown, the controller automati-
cally reduces the slew rate by 1/4th:
______________________________________________________________________________________
23
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