参数资料
| 型号： | MAX8756ETI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 24/30页 |
| 文件大小： | 0K |
| 描述： | IC CNTRL DUAL PS 28-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 控制器，笔记本电脑电源系统 |
| 输入电压： | 4 V ~ 26 V |
| 输出数： | 2 |
| 输出电压： | 1.5V，1.8V，1 V ~ 2.3 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（4x4） |
| 包装： | 带卷 (TR) |
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Interleaved High-Efficiency, Dual Power-Supply
Controllers for Notebook Computers
? ESR ≤ SW
Output-Capacitor Stability Considerations
Stability is determined by the value of the ESR zero rel-
ative to the switching frequency. The boundary of insta-
bility is given by the following equation:
?
π
cause the output voltage to rise above or fall below the
tolerance limits.
The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output-voltage-ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
where:
? ESR =
1
2 π R ESR C OUT
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
For a typical 300kHz application, the ESR zero frequen-
cy must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use
at the time of publication have typical ESR zero fre-
quencies of 25kHz. In the design example used for
inductor selection, the ESR needed to support 25mV P-P
ripple is 25mV/1.5A = 16.7m Ω . One 220μF/4V SANYO
polymer (TPE) capacitor provides 15m Ω (max) ESR.
This results in a zero at 48kHz, well within the bounds
of stability.
For low input-voltage applications where the duty cycle
exceeds 50% (V OUT / V IN ≥ 50%), the output ripple
voltage should not be greater than twice the internal
slope-compensation voltage:
V RIPPLE ≤ 0.02 x V OUT
Input Capacitor Selection
The input capacitor must meet the ripple-current
requirement (I RMS ) imposed by the switching currents.
For an out-of-phase regulator, the total RMS current in
the input capacitor is a function of the load currents,
the input currents, the duty cycles, and the amount of
overlap as defined in Figure 9.
The 40/60 optimal interleaved architecture of the
MAX8716/MAX8717/MAX8756/MAX8757 allows the
input voltage to go as low as 8.3V before the duty
cycles begin to overlap. This offers improved efficiency
over a regular 180° out-of-phase architecture where the
duty cycles begin to overlap below 10V. Figure 9
INPUT CAPACITOR RMS CURRENT
where V RIPPLE equals Δ I INDUCTOR x R ESR . The worst-
case ESR limit occurs when V IN = 2 x V OUT , so the
above equation can be simplified to provide the follow-
ing boundary condition:
R ESR ≤ 0.04 x L x ? OSC
Do not put high-value ceramic capacitors directly
across the feedback sense point without taking precau-
tions to ensure stability. Large ceramic capacitors can
have a high-ESR zero frequency and cause erratic,
unstable operation. However, it is easy to add enough
series resistance by placing the capacitors a couple of
inches downstream from the feedback sense point,
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
vs. INPUT VOLTAGE
IN PHASE
50/50 INTERLEAVING
40/60 OPTIMAL
INTERLEAVING
5V/5A AND 3.3V/5A
which should be as close as possible to the inductor.
6
8
10
12
14
16
18
20
Unstable operation manifests itself in two related but
distinctly different ways: short/long pulses or cycle
V IN (V)
INPUT RMS CURRENT FOR INTERLEAVED OPERATION
skipping resulting in a lower switching frequency.
Instability occurs due to noise on the output or because
I RMS =
(I OUT1 - I IN ) 2 (D LX1 - D OL ) + (I OUT2 - I IN ) 2 (D LX2 - D OL ) +
(I OUT1 + I OUT2 - I IN ) 2 D OL + I IN2 (1 - D LX1 - D LX2 + D OL )
D LX1 = OUT1
D LX2 = OUT2
the ESR is so low that there is not enough voltage ramp
in the output voltage signal. This “fools” the error com-
V
V IN
V
V IN
D OL = DUTY-CYCLE OVERLAP FRACTION
I IN = OUT1 OUT1
parator into triggering too early or skipping a cycle.
Cycle skipping is more annoying than harmful, resulting
in nothing worse than increased output ripple.
V I + V OUT2 I OUT2
V IN
INPUT RMS CURRENT FOR SINGLE-PHASE OPERATION
(
However, it can indicate the possible presence of loop
instability due to insufficient ESR. Loop instability can
result in oscillations at the output after line or load
steps. Such perturbations are usually damped, but can
I RMS = I LOAD V OUT (V IN - V OUT )
V IN
Figure 9. Input RMS Current
)
24
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相关代理商/技术参数 |
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| MAX8757ETG+ | 制造商:Maxim Integrated Products 功能描述:INTERLEAVED HI-EFF AND DUAL PS CNTRLR 24TQFN EP - Rail/Tube |
| MAX8757ETI+ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX8758ETG+ | 功能描述:LCD 驱动器 Step-Up Regulator RoHS:否 制造商:Maxim Integrated 数位数量:4.5 片段数量:30 最大时钟频率:19 KHz 工作电源电压:3 V to 3.6 V 最大工作温度:+ 85 C 最小工作温度:- 20 C 封装 / 箱体:PDIP-40 封装:Tube |
| MAX8758ETG+T | 功能描述:LCD 驱动器 Step-Up Regulator RoHS:否 制造商:Maxim Integrated 数位数量:4.5 片段数量:30 最大时钟频率:19 KHz 工作电源电压:3 V to 3.6 V 最大工作温度:+ 85 C 最小工作温度:- 20 C 封装 / 箱体:PDIP-40 封装:Tube |
| MAX8758ETJ | 功能描述:LCD 驱动器 Step-Up Regulator RoHS:否 制造商:Maxim Integrated 数位数量:4.5 片段数量:30 最大时钟频率:19 KHz 工作电源电压:3 V to 3.6 V 最大工作温度:+ 85 C 最小工作温度:- 20 C 封装 / 箱体:PDIP-40 封装:Tube |
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