参数资料
型号: MAX8756ETI+T
厂商: Maxim Integrated Products
文件页数: 27/30页
文件大小: 0K
描述: IC CNTRL DUAL PS 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 控制器,笔记本电脑电源系统
输入电压: 4 V ~ 26 V
输出数: 2
输出电压: 1.5V,1.8V,1 V ~ 2.3 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(4x4)
包装: 带卷 (TR)
Interleaved High-Efficiency, Dual Power-Supply
Controllers for Notebook Computers
? Minimize current-sensing errors by connecting
CSH_ and CSL_ directly across the current-sense
resistor (R SENSE_ ).
? When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
? Route high-speed switching nodes (BST_, LX_, DH_,
and DL_) away from sensitive analog areas (REF,
FB_, CSH_, CSL_).
Layout Procedure
1) Place the power components first, with ground ter-
3) Group the gate-drive components (BST_ diode and
capacitor and LDO5 bypass capacitor) together
near the controller IC.
4) Make the DC-DC controller ground connections as
shown in Figures 1 and 10. This diagram can be
viewed as having two separate ground planes:
power ground, where all the high-power compo-
nents go; and an analog ground plane for sensitive
analog components. The analog ground plane and
power ground plane must meet only at a single point
directly at the IC.
5) Connect the output power planes directly to the out-
put filter capacitor positive and negative terminals
with multiple vias. Place the entire DC-DC converter
circuit as close to the load as is practical.
minals adjacent (N L _ source, C IN , C OUT _, and D L _
anode). If possible, make all these connections on
the top layer with wide, copper-filled areas.
2) Mount the controller IC adjacent to the low-side
MOSFET, preferably on the back side opposite N L_
and N H_ to keep LX_, GND, DH_, and the DL_ gate-
drive lines short and wide. The DL_ and DH_ gate
traces must be short and wide (50 mils to 100 mils
wide if the MOSFET is 1in from the controller IC) to
keep the driver impedance low and for proper adap-
tive dead-time sensing.
TRANSISTOR COUNT: 5879
PROCESS: BiCMOS
Chip Information
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27
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