参数资料
型号: MAX8760ETL+
厂商: Maxim Integrated Products
文件页数: 29/39页
文件大小: 0K
描述: IC CNTRLR QUICK PWM 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
系列: Quick-PWM™
应用: 控制器,6 位 VID AMD 移动式 Turion?
输入电压: 4 V ~ 28 V
输出数: 2
输出电压: 0.38 V ~ 1.55 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 管件
Dual-Phase, Quick-PWM Controller for AMD
Mobile Turion 64 CPU Core Power Supplies
Low-Power Pulse Skipping
During pulse-skipping override mode ( SKIP = REF or
GND, Table 7), the multiphase Quick-PWM controllers
use an automatic pulse-skipping control scheme. When
? i
? t
=
V BATT - V OUT
L
I PEAK
SKIP is pulled low, the controller uses the automatic
pulse-skipping control scheme, overriding forced-PWM
operation, and blanks the upper VROK threshold.
SKIP is a three-level logic input—GND, REF, or high.
This input is intended to be driven by a dedicated
open-drain output with the pullup resistor connected
either to REF (or a resistive divider from V CC ) or to a
logic-level high-bias supply (3.3V or greater).
I LOAD = I PEAK /2
When driven to GND, the multiphase Quick-PWM
0
ON-TIME
TIME
controller disables the secondary phase (DLS = PGND
and DHS = LXS) and the primary phase uses the auto-
matic pulse-skipping control scheme. When pulled up
to REF, the controller keeps both phases active and
uses the automatic pulse-skipping control scheme—
alternating between the primary and secondary phases
with each cycle.
Automatic Pulse-Skipping Switchover
In skip mode ( SKIP = REF or GND), an inherent automatic
switchover to PFM takes place at light loads (Figure 7). A
comparator that truncates the low-side switch on-time at
the inductor current’s zero crossing affects this switch-
Figure 7. Pulse-Skipping/Discontinuous Crossover Point
I PEAK
I LOAD
I LIMIT
over. The zero-crossing comparator senses the inductor
current across the current-sense resistors. Once V C _ P -
V C _ N drops below the zero-crossing comparator thresh-
old (see the Electrical Characteristics table), the com-
parator forces DL low (Figure 5). This mechanism causes
0
I LIMIT(VALLEY) = I LOAD(MAX)
TIME
(
2 - LIR
2 η
)
I LOAD ( SKIP ) = η TOTAL ? OUT ? ? IN OUT ?
the threshold between pulse-skipping PFM and nonskip-
ping PWM operation to coincide with the boundary
between continuous and discontinuous inductor-current
operation. The PFM/PWM crossover occurs when the
load current of each phase is equal to 1/2 the peak-to-
peak ripple current, which is a function of the inductor
value (Figure 7). For a battery input range of 7V to 20V,
this threshold is relatively constant, with only a minor
dependence on the input voltage due to the typically low
duty cycles. The total load current at the PFM/PWM
crossover threshold (I LOAD(SKIP) ) is approximately:
? V K ? ? V - V ?
? L ? ? V IN ?
where η TOTAL is the number of active phases, and K is
the on-time scale factor (Table 6).
The switching waveforms may appear noisy and asyn-
chronous when light loading activates pulse-skipping
operation, but this is a normal operating condition that
results in high light-load efficiency. Varying the inductor
value makes trade-offs between PFM noise and light-load
Figure 8. “Valley” Current-Limit Threshold Point
efficiency. Generally, low inductor values produce a
broader efficiency vs. load curve, while higher values
result in higher full-load efficiency (assuming that the coil
resistance remains fixed) and less output voltage ripple.
Penalties for using higher inductor values include larger
physical size and degraded load-transient response,
especially at low input voltage levels.
Current-Limit Circuit
The current-limit circuit employs a unique “valley” current-
sensing algorithm that uses current-sense resistors
between the current-sense inputs (C_P to C_N) as the cur-
rent-sensing elements. If the current-sense signal of the
selected phase is above the current-limit threshold, the
PWM controller does not initiate a new cycle (Figure 8)
until the inductor current of the selected phase drops
below the valley current-limit threshold. When either phase
trips the current limit, both phases are effectively current
limited since the interleaved controller does not initiate a
cycle with either phase.
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