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参数资料
| 型号： | MAX8952EWE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 15/31页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2.5A 16WLP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.77 V ~ 1.4 V |
| 输入电压： | 2.5 V ~ 5.5 V |
| 频率 - 开关： | 3.25MHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-UFBGA，WLCSP |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-WLP（2x2） |
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MAX8952
2.5A Step-Down Regulator
with Remote Sense in 2mm x 2mm WLP
t RAMP _ MIN = ×
t CLK _ MAX
2
t RAMP _ MAX = ×
t CLK _ MIN
2
teristics). Soft-start is particularly useful for high-imped-
ance input sources, such as Li+ and alkaline cells.
When enabling the IC into a prebiased output, the IC
performs a complete soft-start cycle.
Synchronous Rectification
An internal n-channel synchronous rectifier eliminates
the need for an external Schottky diode and improves
efficiency. The synchronous rectifier turns on during the
second half of each switching cycle (off-time). During
this time, the voltage across the inductor is reversed,
and the inductor current ramps down. In PWM mode,
the synchronous rectifier turns off at the end of the
switching cycle. In power-save mode, the synchronous
rectifier turns off when the inductor current falls below
50mA (typ) or at the end of the switching cycle,
whichever occurs first.
determined by the output capacitance and the external
load. Small loads result in an output-voltage decay that
is slower than that specified by RAMP; large loads
result in an output-voltage decay that is no faster than
that specified by RAMP When the RAMP_DOWN bit is
set in power-save mode, the zero-cross comparator is
disabled during the ramp-down condition. Active ramp-
down functionality is inherent in forced-PWM operation.
Calculate the maximum and minimum values for the
ramp rate as follows:
V OUT _ LSB 1
RAMP _ CODE
V OUT _ LSB 1
RAMP _ CODE
Ramp-Rate Control
The MAX8952 output voltage has an actively controlled
where:
V OUT _ LSB = 10 mV
variable ramp rate, set with the I 2 C interface (see
Figures 6, 7, and 8). The value set in the RAMP register
controls the output voltage ramp rate. The
RAMP_DOWN bit controls the active ramp-down
behavior in power-save mode. When the regulator is set
for power-save mode and the RAMP_DOWN bit is
t CLK _ MAX =
t CLK _ MIN =
1
f SW _ MIN
1
f SW _ MAX
cleared, the ramp-down is not actively controlled, and
the regulator output voltage ramps down at the rate
f SW = 3.25MHz ±10% for PWM operation
f SW = 3.25MHz ±25% for hysteretic operation
f SW = SYNC
OUTPUT
VOLTAGE
V OUT '
V OUT
DELTA V = 10mV
10mV/RAMP RATE
TIME
f
n
f SYNC = frequency of external clock
n = 4 for 13MHz, 6 for 19.2MHz, and 8 for 26MHz
RAMP_CODE = value of the RAMP[2:0] register (see
Table 9)
Thermal-Overload Protection
Thermal-overload protection limits total power dissipa-
tion in the IC. When internal thermal sensors detect a
Figure 6. Ramp-Up Function
FINAL
OUTPUT
VOLTAGE
V OUT
DELTA
OUTPUT
VOLTAGE
V OUT '
V = 10mV
10mV/RAMP
RATE
TIME
MODE CHANGE
TO HIGHER VOUT
MODE CHANGE
TO LOWER VOUT
Figure 7. Ramp-Down Function
Maxim Integrated
Figure 8. Mode Change Before Final Value is Reached
15
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