参数资料
型号: MAX8952EWE+T
厂商: Maxim Integrated Products
文件页数: 19/31页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2.5A 16WLP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.77 V ~ 1.4 V
输入电压: 2.5 V ~ 5.5 V
频率 - 开关: 3.25MHz
电流 - 输出: 2.5A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-UFBGA,WLCSP
包装: 带卷 (TR)
供应商设备封装: 16-WLP(2x2)
MAX8952
2.5A Step-Down Regulator
with Remote Sense in 2mm x 2mm WLP
LEGEND
MASTER TO
SLAVE
SLAVE TO
MASTER
a) WRITING TO A SINGLE REGISTER WITH THE WRITE BYTE PROTOCOL
1
S
7
SLAVE ADDRESS
1
0
1
A
8
REGISTER POINTER
1
A
8
DATA
1
A
1
P
NUMBER OF BITS
R/W
b) WRITING TO MULTIPLE REGISTERS
1
S
7
SLAVE ADDRESS
1
0
1
A
8
REGISTER POINTER X
1
A
8
DATA X
1
A
8
DATA X+1
1
A
...
NUMBER OF BITS
R/W
...
8
DATA X+n-1
1
A
8
DATA X+n
1
A P
NUMBER OF BITS
Figures 14a and 14b. Writing to the IC
1) The master sends a START command.
2) The master sends the 7-bit slave address followed
by a write bit.
3) The addressed slave asserts an acknowledge by
pulling SDA low.
4) The master sends an 8-bit register pointer.
5) The slave acknowledges the register pointer.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave address followed
by a read bit.
8) The slave asserts an acknowledge by pulling SDA low.
9) The slave sends the 8-bit data (contents of the
register).
10) The master asserts a not acknowledge by keeping
SDA high.
11) The master sends a STOP condition.
In addition, the IC can read a block of multiple sequential
registers as shown in Figure 15b. Use the following pro-
cedure to read a sequential block of registers:
1) The master sends a START command.
2) The master sends the 7-bit slave address followed
by a write bit.
Maxim Integrated
3) The addressed slave asserts an acknowledge by
pulling SDA low.
4) The master sends an 8-bit register pointer of the
first register in the block.
5) The slave acknowledges the register pointer.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave address followed
by a read bit.
8) The slave asserts an acknowledge by pulling SDA low.
9) The slave sends the 8-bit data (contents of the reg-
ister).
10) The master asserts an acknowledge by pulling SDA
low when there is more data to read, or a not
acknowledge by keeping SDA high when all data
has been read.
11) Steps 9 and 10 are repeated for as many registers
in the block, with the register pointer automatically
incremented each time.
12) The master sends a STOP condition.
19
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