参数资料
型号: MAX9888EVKIT+
厂商: Maxim Integrated Products
文件页数: 79/115页
文件大小: 0K
描述: KIT EVALUATION FOR MAX9888
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: DirectDrive®, FLEXSOUND™
相关产品: MAX9888EWY+T-ND - IC CODEC AUDIO FLEXSOUND 63WLP
Stereo Audio CODEC
with FlexSound Technology
MAX9888
66
Table 6. Record Path Signal Processing Registers (continued)
REGISTER
BIT
NAME
DESCRIPTION
0x3D
3
AGCATK
AGC Attack Time
Defined as the time required to reduce gain by 63% of the total gain reduction (one time
constant of the exponential response). Attack times are longer for low AGC threshold
levels. See Figure 12 for details.
00 = 2ms
01 = 7.2ms
10 = 31ms
11 = 123ms
2
1
AGCHLD
AGC Hold Time
The delay before the AGC release begins. The hold time counter starts whenever the
signal drops below the AGC threshold and is reset by any signal that exceeds the
threshold. Set AGCHLD to enable the AGC circuit. See Figure 12 for details.
00 = AGC disabled
01 = 50ms
10 = 100ms
11 = 400ms
0
0x3E
7
ANTH
Noise Gate Threshold
Gain is reduced for signals below the threshold to quiet noise. The thresholds are relative
to the ADC’s full-scale output voltage.
6
VALUE
THRESHOLD
(dBFS)
VALUE
THRESHOLD
(dBFS)
0x0
Noise gate disabled
0x8
-45
0x1
Reserved
0x9
-41
5
0x2
Reserved
0xA
-38
0x3
-64
0xB
-34
0x4
-62
0xC
-30
4
0x5
-58
0xD
-27
0x6
-53
0xE
-22
0x7
-50
0xF
-16
3
AGCTH
AGC Threshold
Gain is reduced when signals exceed the threshold to prevent clipping. The thresholds
are relative to the ADC’s full-scale voltage.
2
VALUE
THRESHOLD
(dBFS)
VALUE
THRESHOLD
(dBFS)
0x0
-3
0x8
-11
0x1
-4
0x9
-12
1
0x2
-5
0xA
-13
0x3
-6
0xB
-14
0x4
-7
0xC
-15
0
0x5
-8
0xD
-16
0x6
-9
0xE
-17
0x7
-10
0xF
-18
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