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参数资料
| 型号： | MB9BF505NBGL |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PBGA112 |
| 封装： | 10 X 10 MM, 1.45 MM HEIGHT, 0.80 MM PITCH, PLASTIC, FBGA-112 |
| 文件页数： | 11/120页 |
| 文件大小： | 1277K |
| 代理商： | MB9BF505NBGL |
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108
8266D-MCU Wireless-06/12
ATmega128RFA1
Bit 7:0 – Res7:0 - Reserved
These bits are reserved for future use.
9.12.8 TRX_CTRL_1 – Transceiver Control Register 1
Bit
7
6
5
4
NA ($144)
PA_EXT_EN
IRQ_2_EXT_EN
TX_AUTO_CRC_ON
Res4
TRX_CTRL_1
Read/Write
RW
R
Initial Value
0
1
0
Bit
3
2
1
0
NA ($144)
Res3
Res2
Res1
Res0
TRX_CTRL_1
Read/Write
R
Initial Value
0
The TRX_CTRL_1 register is a multi purpose register to control various operating
modes and settings of the radio transceiver.
Bit 7 – PA_EXT_EN - External PA support enable
This register bit enables pin DIG3 and pin DIG4 to indicate the transmit state of the
radio transceiver. The control of the external RF front-end is disabled when this bit is 0.
Both pins DIG3 and DIG4 are then defined by the register of I/O ports F and G (PORTF,
DDRF, PORTG, DDRG). The control of the external front-end is enabled when this bit is
1. DIG3 and DIG4 then indicate the state of the radio transceiver. Pin DIG3 is high and
pin DIG4 is low in the state TX_BUSY. In all other states pin DIG3 is low and pin DIG4
is high. It is recommended to set PA_EXT_EN=1 only in receive or transmit states to
reduce the power consumption or avoid leakage current of external RF switches or
other building blocks especially during SLEEP state.
Bit 6 – IRQ_2_EXT_EN - Connect Frame Start IRQ to TC1
When this bit is set to one the capture input of Timer/Counter 1 is connected to the RX
frame start signal and pin DIG2 becomes an output, driving the RX frame start signal.
Antenna Diversity RF switch control (ANT_EXT_SW_EN=1) shall not be used at the
same time, because it shares the same device pin. The function IRQ_2_EXT_EN is
available for alternate frame time stamping using Timer/Counter 1. In general the
preferred method for frame time stamping is using the symbol counter.
Bit 5 – TX_AUTO_CRC_ON - Enable Automatic CRC Calculation
This register bit controls the automatic FCS generation for TX operations. The
automatic FCS algorithm is performed autonomously by the radio transceiver if register
bit TX_AUTO_CRC_ON=1.
Bit 4:0 – Res4:0 - Reserved
9.12.9 PHY_TX_PWR – Transceiver Transmit Power Control Register
Bit
7
6
5
4
NA ($145)
PA_BUF_LT1
PA_BUF_LT0
PA_LT1
PA_LT0
PHY_TX_PWR
Read/Write
RW
Initial Value
1
0
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